From 2f113d2bee1daf4641248b405876346ff040b5a0 Mon Sep 17 00:00:00 2001 From: Anaadi Mishra Date: Thu, 12 Dec 2024 15:59:26 +0530 Subject: [PATCH 1/5] dt-bindings: clock: qcom: add the DISPCC binding for kera Add DISPCC clock binding for kera platform. Change-Id: I3fd06bb26f5dd2b98653c0be22a2ff742de485ac Signed-off-by: Anaadi Mishra --- bindings/clock/qcom,dispcc-sm8x50.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/bindings/clock/qcom,dispcc-sm8x50.yaml b/bindings/clock/qcom,dispcc-sm8x50.yaml index 0d15434e..4c5564e3 100644 --- a/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -32,6 +32,7 @@ properties: - qcom,sun-dispcc - qcom,tuna-dispcc - qcom,tuna-dispcc-v1 + - qcom,kera-dispcc clocks: items: From eca7fe7ef3eb23b3ef35cca0805d2c24c4df6eb1 Mon Sep 17 00:00:00 2001 From: Anaadi Mishra Date: Wed, 25 Sep 2024 16:36:41 +0530 Subject: [PATCH 2/5] ARM: dts: msm: Update dispcc clock node as GenPD provider on Kera Mark dispcc clock node as GenPD provider and disable the display GDSC regulator nodes for kera platform. While at it, keep the gdsc's as it is on kera-rumi platform and update the compatible to align with freq plan. Change-Id: If01f876b3d160cf5c1cfe6be13e3e4b42f62cfa6 Signed-off-by: Anaadi Mishra --- qcom/kera-rumi.dtsi | 8 ++++++++ qcom/kera.dtsi | 5 ++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/qcom/kera-rumi.dtsi b/qcom/kera-rumi.dtsi index 76d7f98c..e05aabe2 100644 --- a/qcom/kera-rumi.dtsi +++ b/qcom/kera-rumi.dtsi @@ -172,3 +172,11 @@ &video_cc_mvs0c_gdsc { status = "ok"; }; + +&disp_cc_mdss_core_gdsc { + status = "ok"; +}; + +&disp_cc_mdss_core_int2_gdsc { + status = "ok"; +}; diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index ac2ac1de..efcb4f6d 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -1798,7 +1798,7 @@ }; dispcc: clock-controller@af00000 { - compatible = "qcom,tuna-dispcc", "syscon"; + compatible = "qcom,kera-dispcc", "syscon"; reg = <0xaf00000 0x20000>; reg-name = "cc_base"; vdd_mm-supply = <&VDD_CX_LEVEL>; @@ -1814,6 +1814,7 @@ qcom,disp_crm-crmc = <&dispcc_crm>; #clock-cells = <1>; #reset-cells = <1>; + #power-domain-cells = <1>; }; gcc: clock-controller@100000 { @@ -3163,13 +3164,11 @@ &disp_cc_mdss_core_gdsc { clocks = <&gcc GCC_DISP_AHB_CLK>; parent-supply = <&VDD_CX_LEVEL>; - status = "ok"; }; &disp_cc_mdss_core_int2_gdsc { clocks = <&gcc GCC_DISP_AHB_CLK>; parent-supply = <&VDD_CX_LEVEL>; - status = "ok"; }; &gcc_pcie_0_gdsc { From db1db4f7647a3e9db065b59168667f6feac22d40 Mon Sep 17 00:00:00 2001 From: Rajeev Nandan Date: Wed, 27 Nov 2024 14:37:20 +0530 Subject: [PATCH 3/5] ARM: dts: msm: add trusted touch properties for kera Add trusted touch properties for tuna on CDP, MTP platforms. Change-Id: I93d85e4b21387835cffc08ebfd7376cb1d98f95d Signed-off-by: Rajeev Nandan --- qcom/kera-vm-cdp.dtsi | 23 +++++++++++++++++++++++ qcom/kera-vm-mtp.dtsi | 23 +++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/qcom/kera-vm-cdp.dtsi b/qcom/kera-vm-cdp.dtsi index 1510613d..10bb9113 100644 --- a/qcom/kera-vm-cdp.dtsi +++ b/qcom/kera-vm-cdp.dtsi @@ -5,3 +5,26 @@ &soc { }; + +&qupv3_se8_spi { + status = "ok"; + goodix-berlin@0 { + compatible = "goodix,gt9916S"; + reg = <0>; + spi-max-frequency = <1000000>; + goodix,panel-max-x = <1080>; + goodix,panel-max-y = <2400>; + goodix,panel-max-w = <255>; + goodix,panel-max-p = <4096>; + goodix,touch-type = "primary"; + goodix,qts_en; + qts,trusted-touch-mode = "vm_mode"; + qts,touch-environment = "tvm"; + qts,trusted-touch-type = "primary"; + qts,trusted-touch-spi-irq = <653>; + qts,trusted-touch-io-bases = <0xa90000>; + qts,trusted-touch-io-sizes = <0x1000>; + qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0 + &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; + }; +}; diff --git a/qcom/kera-vm-mtp.dtsi b/qcom/kera-vm-mtp.dtsi index 1510613d..10bb9113 100644 --- a/qcom/kera-vm-mtp.dtsi +++ b/qcom/kera-vm-mtp.dtsi @@ -5,3 +5,26 @@ &soc { }; + +&qupv3_se8_spi { + status = "ok"; + goodix-berlin@0 { + compatible = "goodix,gt9916S"; + reg = <0>; + spi-max-frequency = <1000000>; + goodix,panel-max-x = <1080>; + goodix,panel-max-y = <2400>; + goodix,panel-max-w = <255>; + goodix,panel-max-p = <4096>; + goodix,touch-type = "primary"; + goodix,qts_en; + qts,trusted-touch-mode = "vm_mode"; + qts,touch-environment = "tvm"; + qts,trusted-touch-type = "primary"; + qts,trusted-touch-spi-irq = <653>; + qts,trusted-touch-io-bases = <0xa90000>; + qts,trusted-touch-io-sizes = <0x1000>; + qts,trusted-touch-vm-gpio-list = <&tlmm 0 0 &tlmm 1 0 &tlmm 2 0 + &tlmm 3 0 &tlmm 16 0 &tlmm 13 0x2008>; + }; +}; From 8e42a691cee6709d951f8c9cb413ca48c49c730c Mon Sep 17 00:00:00 2001 From: Manish Pandey Date: Thu, 5 Dec 2024 14:34:06 +0530 Subject: [PATCH 4/5] ARM: dts: msm: Update ref_clk_src for kera UFS 2.x platforms Update ref_clk_src to source 19.2MHz clock to UFS 2.x Platforms. Change-Id: I0f8a2307bc700a4eac2caa5e9ff5d0bfaac1b163 Signed-off-by: Manish Pandey --- qcom/kera_ufs2.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/qcom/kera_ufs2.dtsi b/qcom/kera_ufs2.dtsi index 1ed18475..320ed23f 100644 --- a/qcom/kera_ufs2.dtsi +++ b/qcom/kera_ufs2.dtsi @@ -2,6 +2,9 @@ /* * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include +#include +#include &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-niobe"; @@ -21,6 +24,20 @@ vdda-qref-supply = <&L2B>; vdda-qref-max-microamp = <1890>; + clock-names = "ref_clk_src", + "ref_aux_clk", "qref_clk", + "rx_sym0_mux_clk", "rx_sym1_mux_clk", "tx_sym0_mux_clk", + "rx_sym0_phy_clk", "rx_sym1_phy_clk", "tx_sym0_phy_clk"; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&tcsrcc TCSR_UFS_CLKREF_EN>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK_SRC>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK_SRC>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK_SRC>, + <&ufs_phy_rx_symbol_0_clk>, + <&ufs_phy_rx_symbol_1_clk>, + <&ufs_phy_tx_symbol_0_clk>; + status = "ok"; }; From 4fabf45b25af22fa8e3e7f938b2a9dcd50b65ed5 Mon Sep 17 00:00:00 2001 From: Udipto Goswami Date: Wed, 25 Dec 2024 13:00:22 +0530 Subject: [PATCH 5/5] ARM: dts: msm: Add High Speed USB support on Kera Currently, the node for eusb2_phy0 is defined but not used by controller which makes the associated resources to be consumed. Therefore if phy probes doesn't happen the controller goes into core soft reset failure. Fix this by utilizing the node in the controller. This will call the phy's probe and hence clocks & regulators will be initialized. Change-Id: Ica46af01154d5e583e011e4f2d84a80fb0589ac8 Signed-off-by: Udipto Goswami --- qcom/kera-usb.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/kera-usb.dtsi b/qcom/kera-usb.dtsi index 60032b6f..8e6f20b2 100644 --- a/qcom/kera-usb.dtsi +++ b/qcom/kera-usb.dtsi @@ -73,7 +73,7 @@ dma-coherent; interrupts = ; - usb-phy = <&usb_nop_phy>, <&usb_qmp_dp_phy>; + usb-phy = <&eusb2_phy0>, <&usb_qmp_dp_phy>; snps,disable-clk-gating; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>;