From d5963677a9f609ba5a44aa903862f1c6f9a373b4 Mon Sep 17 00:00:00 2001
From: Rashid Zafar <quic_rzafar@quicinc.com>
Date: Mon, 30 Oct 2023 10:40:36 -0700
Subject: [PATCH] ARM: dts: msm: Add CRM device for camera and PCIe for sun

Add CRM device for camera and PCIe.

Change-Id: I61c78a4c645f8e05402767a40ebb41fdcf0119d1
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
---
 qcom/sun.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index aac9e96c..4226d01a 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -852,6 +852,30 @@
 		};
 	};
 
+	cam_crm: crm@adcb000 {
+		label = "cam_crm";
+		compatible = "qcom,cam-crm-v2";
+		reg = <0xadcb000 0x1e00>, <0xadcce00 0x400>, <0xadcd600 0x2000>, <0xadcfd00 0x100>;
+		reg-names = "base", "crm_b", "crm_c", "common";
+		interrupts = <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>;
+		interrupt-names = "cam_crm_drv0";
+		clocks = <&camcc CAM_CC_DRV_AHB_CLK>;
+		qcom,hw-drv-ids = <0 1 2>;
+		qcom,sw-drv-ids = <0>;
+	};
+
+	pcie_crm: crm@1d01000 {
+		label = "pcie_crm";
+		compatible = "qcom,pcie-crm-v2";
+		reg = <0x1d01000 0x2000>, <0x1d03000 0x400>, <0x1d03800 0x2000>, <0x1d05f00 0x100>;
+		reg-names = "base", "crm_b", "crm_c", "common";
+		interrupts = <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>;
+		interrupt-names = "pcie_crm_drv0";
+		clocks = <&pcie_0_pipe_clk>;
+		qcom,hw-drv-ids = <0 1>;
+		qcom,sw-drv-ids = <0>;
+	};
+
 	cluster-device0 {
 		compatible = "qcom,lpm-cluster-dev";
 		power-domains = <&CLUSTER_PD0>;