diff --git a/qcom/sun-cdp.dtsi b/qcom/sun-cdp.dtsi
index 83f5b5e3..b4cc0fc1 100644
--- a/qcom/sun-cdp.dtsi
+++ b/qcom/sun-cdp.dtsi
@@ -108,6 +108,25 @@
 	periph-d46-supply = <&L7N>;
 };
 
+&pm8550_switch0 {
+	qcom,led-mask = <9>; /* Channels 1 & 4 */
+	qcom,symmetry-en;
+};
+
+&pm8550_switch1 {
+	qcom,led-mask = <6>; /* Channels 2 & 3 */
+	qcom,symmetry-en;
+};
+
+&pm8550_switch2 {
+	qcom,led-mask = <15>; /* All Channels */
+	qcom,symmetry-en;
+};
+
+&pm8550_flash {
+	status = "ok";
+};
+
 &ufsphy_mem {
 	compatible = "qcom,ufs-phy-qmp-v4-sun";
 
diff --git a/qcom/sun-mtp.dtsi b/qcom/sun-mtp.dtsi
index c8e0a73d..413d3145 100644
--- a/qcom/sun-mtp.dtsi
+++ b/qcom/sun-mtp.dtsi
@@ -169,6 +169,25 @@
 	periph-d46-supply = <&L7N>;
 };
 
+&pm8550_switch0 {
+	qcom,led-mask = <9>; /* Channels 1 & 4 */
+	qcom,symmetry-en;
+};
+
+&pm8550_switch1 {
+	qcom,led-mask = <6>; /* Channels 2 & 3 */
+	qcom,symmetry-en;
+};
+
+&pm8550_switch2 {
+	qcom,led-mask = <15>; /* All Channels */
+	qcom,symmetry-en;
+};
+
+&pm8550_flash {
+	status = "ok";
+};
+
 &ufsphy_mem {
 	compatible = "qcom,ufs-phy-qmp-v4-sun";
 
diff --git a/qcom/sun-qrd.dtsi b/qcom/sun-qrd.dtsi
index f3141612..2c57a978 100644
--- a/qcom/sun-qrd.dtsi
+++ b/qcom/sun-qrd.dtsi
@@ -108,6 +108,25 @@
 	periph-d46-supply = <&L7N>;
 };
 
+&pm8550_switch0 {
+	qcom,led-mask = <9>; /* Channels 1 & 4 */
+	qcom,symmetry-en;
+};
+
+&pm8550_switch1 {
+	qcom,led-mask = <6>; /* Channels 2 & 3 */
+	qcom,symmetry-en;
+};
+
+&pm8550_switch2 {
+	qcom,led-mask = <15>; /* All Channels */
+	qcom,symmetry-en;
+};
+
+&pm8550_flash {
+	status = "ok";
+};
+
 &ufsphy_mem {
 	compatible = "qcom,ufs-phy-qmp-v4-sun";