From d1de22a32ae4841c1597001cce477a1a1ccc91f0 Mon Sep 17 00:00:00 2001 From: Ziqi Chen Date: Thu, 26 Oct 2023 12:04:23 +0800 Subject: [PATCH] ARM: dts: qcom: Add SD card support for sun platforms Add SD card support for mtp/cdp/qrd sun platforms. Change-Id: I40ea8c28354040dd7417d6401d60613226c495f4 Signed-off-by: Ziqi Chen --- qcom/sun-cdp.dtsi | 20 ++++++++++++++++++++ qcom/sun-mtp.dtsi | 20 ++++++++++++++++++++ qcom/sun-qrd.dtsi | 20 ++++++++++++++++++++ 3 files changed, 60 insertions(+) diff --git a/qcom/sun-cdp.dtsi b/qcom/sun-cdp.dtsi index ddaa309b..b9035d0e 100644 --- a/qcom/sun-cdp.dtsi +++ b/qcom/sun-cdp.dtsi @@ -156,3 +156,23 @@ status = "ok"; }; + +&sdhc_2 { + status = "ok"; + vdd-supply = <&pm_humu_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <0 800000>; + + vdd-io-supply = <&pm_humu_l8>; + qcom,vdd-io-voltage-level = <1800000 2960000>; + qcom,vdd-io-current-level = <0 5600>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + + cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>; + + resets = <&gcc GCC_SDCC2_BCR>; + reset-names = "core_reset"; +}; diff --git a/qcom/sun-mtp.dtsi b/qcom/sun-mtp.dtsi index 73020792..7bb276e5 100644 --- a/qcom/sun-mtp.dtsi +++ b/qcom/sun-mtp.dtsi @@ -225,3 +225,23 @@ nvmem-cells = <&usb_mode>; nvmem-cell-names = "usb_mode"; }; + +&sdhc_2 { + status = "ok"; + vdd-supply = <&pm_humu_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <0 800000>; + + vdd-io-supply = <&pm_humu_l8>; + qcom,vdd-io-voltage-level = <1800000 2960000>; + qcom,vdd-io-current-level = <0 5600>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + + cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>; + + resets = <&gcc GCC_SDCC2_BCR>; + reset-names = "core_reset"; +}; diff --git a/qcom/sun-qrd.dtsi b/qcom/sun-qrd.dtsi index 0ad10562..f4d30995 100644 --- a/qcom/sun-qrd.dtsi +++ b/qcom/sun-qrd.dtsi @@ -164,3 +164,23 @@ nvmem-cells = <&usb_mode>; nvmem-cell-names = "usb_mode"; }; + +&sdhc_2 { + status = "ok"; + vdd-supply = <&pm_humu_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <0 800000>; + + vdd-io-supply = <&pm_humu_l8>; + qcom,vdd-io-voltage-level = <1800000 2960000>; + qcom,vdd-io-current-level = <0 5600>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_on>; + pinctrl-1 = <&sdc2_off>; + + cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>; + + resets = <&gcc GCC_SDCC2_BCR>; + reset-names = "core_reset"; +};