From d0f765f345060fc244944b1150f1a2f940a93d1e Mon Sep 17 00:00:00 2001 From: Jinfeng Gu Date: Wed, 25 Sep 2024 17:02:58 +0800 Subject: [PATCH] ARM: dts: msm: enable 4-4-2 topology for sharp QHD plus panel This change enabled 4LM and 4DSC topology for sharp QHD plus panel. Change-Id: I3f6c348c6235575c2b14ac73d5ac50c19b1acc1c Signed-off-by: Jinfeng Gu Signed-off-by: lnxdisplay --- display/sun-sde-display-cdp.dtsi | 26 ++++++++++++++++++++++++-- display/sun-sde-display-common.dtsi | 26 ++++++++++++++++++++++++++ 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi index b2dd5503..9ec15fff 100644 --- a/display/sun-sde-display-cdp.dtsi +++ b/display/sun-sde-display-cdp.dtsi @@ -236,6 +236,24 @@ qcom,platform-bklight-en-gpio = <&tlmm 100 0>; }; +&dsi_sharp_qhd_plus_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 98 0>; + qcom,platform-bklight-en-gpio = <&tlmm 100 0>; +}; + +&dsi_sharp_qhd_plus_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 98 0>; + qcom,platform-bklight-en-gpio = <&tlmm 100 0>; +}; + &dsi_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -295,7 +313,9 @@ &dsi_nt37801_amoled_qsync_video &dsi_nt37801_amoled_fhd_plus_cmd &dsi_nt37801_amoled_cmd_ddicspr - &dsi_nt37801_amoled_video_ddicspr>; + &dsi_nt37801_amoled_video_ddicspr + &dsi_sharp_qhd_plus_dsc_cmd + &dsi_sharp_qhd_plus_dsc_video>; }; }; @@ -314,6 +334,8 @@ &dsi_nt37801_amoled_qsync_video &dsi_nt37801_amoled_fhd_plus_cmd &dsi_nt37801_amoled_cmd_ddicspr - &dsi_nt37801_amoled_video_ddicspr>; + &dsi_nt37801_amoled_video_ddicspr + &dsi_sharp_qhd_plus_dsc_cmd + &dsi_sharp_qhd_plus_dsc_video>; }; }; diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index cb197717..98eaab75 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -20,6 +20,8 @@ #include "dsi-panel-nt37801-dsc-wqhd-plus-video-ddicspr.dtsi" #include "dsi-panel-sharp-dsc-4k-cmd.dtsi" #include "dsi-panel-sharp-dsc-4k-video.dtsi" +#include "dsi-panel-sharp-dsc-qhd-plus-cmd.dtsi" +#include "dsi-panel-sharp-dsc-qhd-plus-video.dtsi" #include "dsi-panel-sim-cmd-au.dtsi" #include "dsi-panel-sim-cmd.dtsi" #include "dsi-panel-sim-dsc-10bit-cmd.dtsi" @@ -792,6 +794,30 @@ }; }; +&dsi_sharp_qhd_plus_dsc_cmd { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,mdss-dsi-display-timings { + timing@0 { /* 120 FPS */ + qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07 + 07 07 02 04 00 17 0c]; + qcom,display-topology = <4 4 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_sharp_qhd_plus_dsc_video { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,mdss-dsi-display-timings { + timing@0 { /* 120 FPS */ + qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07 + 07 07 02 04 00 17 0c]; + qcom,display-topology = <4 4 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sim_cmd { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; qcom,poms-align-panel-vsync;