diff --git a/qcom/tuna-usb.dtsi b/qcom/tuna-usb.dtsi
index c75fe5a6..574e8c8a 100644
--- a/qcom/tuna-usb.dtsi
+++ b/qcom/tuna-usb.dtsi
@@ -28,8 +28,15 @@
 		resets = <&gcc GCC_USB30_PRIM_BCR>;
 		reset-names = "core_reset";
 
-		interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "pwr_event_irq";
+		interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				<&pdc 14 IRQ_TYPE_EDGE_RISING>,
+				<&pdc 15 IRQ_TYPE_EDGE_RISING>,
+				<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "pwr_event_irq", "dp_hs_phy_irq",
+				"dm_hs_phy_irq", "ss_phy_irq";
+
+		qcom,use-pdc-interrupts;
+		qcom,use-eusb2-phy;
 
 		qcom,core-clk-rate = <200000000>;
 		qcom,core-clk-rate-hs = <66666667>;
@@ -45,6 +52,7 @@
 			dma-coherent;
 
 			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			usb-phy = <&eusb2_phy0>, <&usb_nop_phy>;
 			snps,disable-clk-gating;
 			snps,has-lpm-erratum;
 			snps,hird-threshold = /bits/ 8 <0x0>;
@@ -65,4 +73,30 @@
 					<&dwc3_0 0x0 0xf0000000 0xffffffff 0x10000000>;
 	};
 
+	/* USB port related High Speed PHY */
+	eusb2_phy0: hsphy@88e3000 {
+		compatible = "qcom,usb-snps-eusb2-phy";
+		reg = <0x88e3000 0x154>,
+			<0x088e2000 0x4>,
+			<0x0c278000 0x4>;
+		reg-names = "eusb2_phy_base",
+			"eud_enable_reg",
+			"eud_detect_reg";
+
+		vdd-supply = <&L3B>;
+		qcom,vdd-voltage-level = <0 880000 880000>;
+		vdd_refgen-supply = <&L2B>;
+
+		clocks = <&rpmhcc RPMH_CXO_PAD_CLK>,
+			<&tcsrcc TCSR_USB2_CLKREF_EN>;
+		clock-names = "ref_clk_src", "ref_clk";
+
+		resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+		reset-names = "phy_reset";
+	};
+
+	usb_nop_phy: usb_nop_phy {
+		compatible = "usb-nop-xceiv";
+	};
+
 };