samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ARM: dts: qcom: Add SPU related nodes to sun dtsi

Browse Source 
Needed for SPU pil on sun dtsi.

Remoteproc-spss, spcom and spss_utils are disabled.

Change-Id: I97519bacccee2f7094edbcf32e3fdac29d67ac77
Signed-off-by: Nurit Lichtenstein <quic_nuritl@quicinc.com>
This commit is contained in:
Nurit Lichtenstein
2023-10-19 17:44:13 +03:00
parent 07e8205d36
commit d04fa7ba64
4 changed files with 300 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

130
bindings/remoteproc/qcom,spss.yaml Normal file
View File

@@ -0,0 +1,130 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,spss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SPSS Peripheral Image Loader
maintainers:
- Nurit Lichtenstein <quic_nuritl@quicinc.com>
description:
This document defines the binding for a component that loads and boots firmware on the QTI Secure Processor.
properties:
compatible:
enum:
- qcom,waipio-spss-pas
- qcom,kalama-spss-pas
- qcom,pineapple-spss-pas
- qcom,sun-spss-pas
reg:
minItems: 6
items:
- description: SP to SoC IRQ status register
- description: SP to SoC IRQ clear register
- description: SP to SoC IRQ mask register
- description: RMB error register
- description: RMB general purpose register
- description: RMB error spare2 register
reg-names:
items:
- const: sp2soc_irq_status
- const: sp2soc_irq_clr
- const: sp2soc_irq_mask
- const: rmb_err
- const: rmb_general_purpose
- const: rmb_err_spare2
interrupts:
minItems: 1
items:
- description: Generic interrupt
clocks:
items:
- description: reference to the xo clock and optionally aggre2 clock
clock-names:
items:
- const: xo
cx-supply:
description: Phandle to the CX regulator
px-supply:
description: Phandle to the PX regulator
memory-region:
maxItems: 1
description: Reference to the reserved-memory for the SPSS
glink-edge:
$ref: /schemas/remoteproc/qcom,glink-edge.yaml#
description:
QTI G-Link subnode which represents communication edge, channels
and devices related to the SPSS.
required:
- compatible
- reg
- reg-names
- interrupts
- cx-supply
- clocks
- clock-names
- memory-region
examples:
#The following example represents the qcom,spss node on a sun device.
- |
spss_pas: remoteproc-spss@1880000 {
compatible = "qcom,sun-spss-pas";
ranges;
reg = <0x188101c 0x4>,
<0x1881024 0x4>,
<0x1881028 0x4>,
<0x188103c 0x4>,
<0x1881100 0x4>,
<0x1882014 0x4>;
reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask",
"rmb_err", "rmb_general_purpose", "rmb_err_spare2";
interrupts = <0 352 1>;
cx-supply = <&VDD_CX_LEVEL>;
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
qcom,proxy-clock-names = "xo";
status = "ok";
memory-region = <&spss_region_mem>;
qcom,spss-scsr-bits = <24 25>;
qcom,extra-size = <4096>;
interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
interconnect-names = "crypto_ddr";
glink-edge {
qcom,remote-pid = <8>;
mboxes = <&ipcc_mproc IPCC_CLIENT_SPSS
IPCC_MPROC_SIGNAL_GLINK_QMP>;
mbox-names = "spss_spss";
interrupt-parent = <&ipcc_mproc>;
interrupts = <IPCC_CLIENT_SPSS
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
reg = <0x1885008 0x8>,
<0x1885010 0x4>;
reg-names = "qcom,spss-addr",
"qcom,spss-size";
label = "spss";
qcom,glink-label = "spss";
};
};

35
bindings/soc/qcom/qcom,spcom.yaml Normal file
View File

@@ -0,0 +1,35 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/qcom/qcom, spcom.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Secure Proccessor Communication (spcom)
maintainers:
- Nurit Lichtenstein <quic_nuritl@quicinc.com>
description: |
This document defines the binding for a component that implements the secure processor communication.
required:
- compatible
- qcom,spcom-ch-names
- qcom,spcom-sp2soc-rmb-reg-addr
- qcom,spcom-sp2soc-rmb-initdone-bit
- qcom,spcom-sp2soc-rmb-pbldone-bit
- qcom,spcom-soc2sp-rmb-reg-addr
- qcom,spcom-soc2sp-rmb-sp-ssr-bit
examples:
#The following example represents the spcom node on a sun device.
- |
qcom,spcom {
compatible = "qcom,spcom";
qcom,spcom-ch-names = "sp_kernel" , "sp_ssr";
qcom,spcom-sp2soc-rmb-reg-addr = <0x01881020>;
qcom,spcom-sp2soc-rmb-initdone-bit = <24>;
qcom,spcom-sp2soc-rmb-pbldone-bit = <25>;
qcom,spcom-soc2sp-rmb-reg-addr = <0x01881030>;
qcom,spcom-soc2sp-rmb-sp-ssr-bit = <0>;
};

47
bindings/soc/qcom/qcom,spss-utils.yaml Normal file
View File

@@ -0,0 +1,47 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/qcom,spss-utils.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: QTI Secure Processor SubSystem Utilities
maintainers:
- Nurit Lichtenstein <quic_nuritl@quicinc.com>
description:
The Secure Processor SubSystem (SPSS) is a dedicated subsystem for security.
It has its own CPU, memories, and cryptographic engine.
It shall provide cryptographic services to other subsystems.
The SPSS firmware is loaded by PIL driver.
The communication with SPSS is done via spcom driver, using glink.
This document defines the binding for a component that selects the SPSS firmware file, according to a dedicated fuse and the platform HW version.
required:
- compatible
- qcom,spss-fuse1-addr
- qcom,spss-fuse1-bit
- qcom,spss-fuse2-addr
- qcom,spss-fuse2-bit
- qcom,spss-dev-firmware-name
- qcom,spss-test-firmware-name
- qcom,spss-prod-firmware-name
- qcom,spss-debug-reg-addr
- qcom,spss-emul-type-reg-addr
examples:
#The following example represents the spss-utils node on a sun device.
- |
qcom,spss_utils {
compatible = "qcom,spss-utils";
qcom,spss-fuse1-addr = <0x007841c4>;
qcom,spss-fuse1-bit = <27>;
qcom,spss-fuse2-addr = <0x007841c4>;
qcom,spss-fuse2-bit = <26>;
qcom,spss-dev-firmware-name = "spss1d"; /* 8 chars max */
qcom,spss-test-firmware-name = "spss1t"; /* 8 chars max */
qcom,spss-prod-firmware-name = "spss1p"; /* 8 chars max */
qcom,spss-debug-reg-addr = <0x01886020>;
qcom,spss-emul-type-reg-addr = <0x01fc8004>;
};

90
qcom/sun.dtsi
View File

@@ -837,6 +837,92 @@
power-domains = <&CLUSTER_PD2>;
};
/* PIL spss node - for loading Secure Processor */
spss_pas: remoteproc-spss@1880000 {
compatible = "qcom,sun-spss-pas";
ranges;
reg = <0x188101c 0x4>,
<0x1881024 0x4>,
<0x1881028 0x4>,
<0x188103c 0x4>,
<0x1881100 0x4>,
<0x1882014 0x4>;
reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask",
"rmb_err", "rmb_general_purpose", "rmb_err_spare2";
interrupts = <0 352 1>;
cx-supply = <&VDD_CX_LEVEL>;
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
qcom,proxy-clock-names = "xo";
status = "ok";
memory-region = <&spss_region_mem>;
qcom,spss-scsr-bits = <24 25>;
qcom,extra-size = <4096>;
interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
interconnect-names = "crypto_ddr";
glink-edge {
qcom,remote-pid = <8>;
mboxes = <&ipcc_mproc IPCC_CLIENT_SPSS
IPCC_MPROC_SIGNAL_GLINK_QMP>;
mbox-names = "spss_spss";
interrupt-parent = <&ipcc_mproc>;
interrupts = <IPCC_CLIENT_SPSS
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
reg = <0x1885008 0x8>,
<0x1885010 0x4>;
reg-names = "qcom,spss-addr",
"qcom,spss-size";
label = "spss";
qcom,glink-label = "spss";
};
};
qcom,spcom {
compatible = "qcom,spcom";
qcom,rproc-handle = <&spss_pas>;
qcom,boot-enabled;
/* predefined channels, remote side is server */
qcom,spcom-ch-names = "sp_kernel", "sp_ssr";
/* sp2soc rmb shared register physical address and bmsk */
qcom,spcom-sp2soc-rmb-reg-addr = <0x01881020>;
qcom,spcom-sp2soc-rmb-initdone-bit = <24>;
qcom,spcom-sp2soc-rmb-pbldone-bit = <25>;
/* soc2sp rmb shared register physical address */
qcom,spcom-soc2sp-rmb-reg-addr = <0x01881030>;
qcom,spcom-soc2sp-rmb-sp-ssr-bit = <0>;
status = "disabled";
};
spss_utils: qcom,spss_utils {
compatible = "qcom,spss-utils";
/* spss fuses physical address */
qcom,rproc-handle = <&spss_pas>;
qcom,spss-fuse1-addr = <0x221C8214>;
qcom,spss-fuse1-bit = <8>;
qcom,spss-fuse2-addr = <0x221C8214>;
qcom,spss-fuse2-bit = <7>;
qcom,spss-dev-firmware-name = "spss1d.mdt"; /* 8 chars max */
qcom,spss-test-firmware-name = "spss1t.mdt"; /* 8 chars max */
qcom,spss-prod-firmware-name = "spss1p.mdt"; /* 8 chars max */
qcom,spss-debug-reg-addr = <0x01886020>;
qcom,spss-debug-reg-addr1 = <0x01888020>;
qcom,spss-debug-reg-addr3 = <0x0188C020>;
qcom,spss-emul-type-reg-addr = <0x01fc8004>;
pil-mem = <&spss_region_mem>;
qcom,pil-size = <0x0F0000>; // padding to 960KB
status = "disabled";
};
clocks {
xo_board: xo_board {
compatible = "fixed-clock";
@@ -2048,9 +2134,9 @@
reg = <0x0 0x9b09a000 0x0 0x2000>;
};
spss_region_mem: spss_region_region@9b100000 {
spss_region_mem: spss_region_region@9b0a0000 {
no-map;
reg = <0x0 0x9b100000 0x0 0x180000>;
reg = <0x0 0x9b0a0000 0x0 0x180000>;
};
spu_secure_shared_memory_mem: spu_secure_shared_memory_region@9b280000 {