diff --git a/Kbuild b/Kbuild index 762643b2..d078accc 100644 --- a/Kbuild +++ b/Kbuild @@ -1,7 +1,10 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-cdp-overlay.dtbo \ display/sun-sde-display-mtp-overlay.dtbo \ - display/sun-sde-display-rumi-overlay.dtbo + display/sun-sde-display-rumi-overlay.dtbo \ + display/sun-sde-display-qrd-sku1-overlay.dtbo \ + display/sun-sde-display-qrd-sku1-v8-overlay.dtbo \ + display/sun-sde-display-qrd-sku2-v8-overlay.dtbo always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) diff --git a/bindings/sde.txt b/bindings/sde.txt index c088ece5..2abbe5a5 100644 --- a/bindings/sde.txt +++ b/bindings/sde.txt @@ -387,6 +387,31 @@ Optional properties: corresponding DSPP block offset as base. - qcom,sde-dspp-demura-size: A u32 value indicating the demura block register address range - qcom,sde-dspp-demura-version: A u32 value indicating the version of demura hardware. +- qcom,sde-dspp-aiqe-off: Array of u32 values indicating the offset of each AIQE block + relative to its parent DSPP block. +- qcom,sde-dspp-aiqe-version: A u32 value indicating the version of the AIQE hardware. +- qcom,sde-dspp-aiqe-size: A u32 value indicating the shared memory size of each AIQE + hardware block instance. +- qcom,sde-dspp-aiqe-dither-off: Array of u32 values indicating the offset of each AIQE + dither block relative to its parent DSPP block. +- qcom,sde-dspp-aiqe-dither-version: A u32 value indicating the version of the AIQE dither + hardware. +- qcom,sde-dspp-aiqe-dither-size: A u32 value indicating the shared memory size of each AIQE + dither hardware block instance. +- qcom,sde-dspp-aiqe-wrapper-off: Array of u32 values indicating the offset of each AIQE + wrapper block relative to its parent DSPP block. +- qcom,sde-dspp-aiqe-wrapper-version: A u32 value indicating the version of the AIQE wrapper + hardware. +- qcom,sde-dspp-aiqe-wrapper-size: A u32 value indicating the shared memory size of each AIQE + wrapper hardware block instance. +- qcom,sde-aiqe-has-feature-mdnie: Boolean property indicating the presence of AIQE feature mDNIe + hardware. +- qcom,sde-aiqe-has-feature-abc: Boolean property indicating the presence of AIQE feature ABC + hardware. +- qcom,sde-aiqe-has-feature-ssrc: Boolean property indicating the presence of AIQE feature SSRC + hardware. +- qcom,sde-aiqe-has-feature-copr: Boolean property indicating the presence of AIQE feature COPR + hardware. - qcom,sde-lm-noise-off: A u32 value indicating noise layer offset from mixer base. - qcom,sde-lm-noise-version: A u32 value indicating the noise layer version. - qcom,sde-vbif-id: Array of vbif ids corresponding to the @@ -710,6 +735,23 @@ Example: qcom,sde-lm-noise-off = <0x320>; qcom,sde-lm-noise-version = <0x00010000>; + qcom,sde-dspp-aiqe-off = <0x39000 0xffffffff 0x3a000 0xffffffff>; + qcom,sde-dspp-aiqe-version = <0x00010000>; + qcom,sde-dspp-aiqe-size = <0x3fc>; + + qcom,sde-dspp-aiqe-dither-off = <0x39700 0xffffffff 0x3a700 0xffffffff>; + qcom,sde-dspp-aiqe-dither-version = <0x00010000>; + qcom,sde-dspp-aiqe-dither-size = <0x20>; + + qcom,sde-dspp-aiqe-wrapper-off = <0x39780 0xffffffff 0x3a780 0xffffffff>; + qcom,sde-dspp-aiqe-wrapper-version = <0x00010000>; + qcom,sde-dspp-aiqe-wrapper-size = <0x1c>; + + qcom,sde-aiqe-has-feature-mdnie; + qcom,sde-aiqe-has-feature-abc; + qcom,sde-aiqe-has-feature-ssrc; + qcom,sde-aiqe-has-feature-copr; + qcom,sde-dspp-rc-mem-size = <2720>; qcom,sde-dest-scaler-top-off = <0x00061000>; qcom,sde-dest-scaler-off = <0x800 0x1000>; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi index eacca56f..25357b7c 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi @@ -87,6 +87,8 @@ 39 01 00 00 00 00 05 FF AA 55 A5 82 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 F3 CC 0C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi index 92004657..a9bda899 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi @@ -83,6 +83,8 @@ 39 01 00 00 00 00 02 9C 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 02 2F 00 + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi index 65b22528..83152a0e 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi @@ -87,6 +87,8 @@ 39 01 00 00 00 00 05 FF AA 55 A5 82 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 F3 CC 0C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi index 0bab8128..652cd619 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi @@ -84,6 +84,8 @@ 39 01 00 00 00 00 02 9C 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 02 2f 00 + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index 1a6143bc..c517fc02 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -193,6 +193,23 @@ qcom,sde-dspp-demura-size = <0xe4>; qcom,sde-dspp-demura-version = <0x00020000>; + qcom,sde-dspp-aiqe-off = <0x39000 0xffffffff 0x3a000 0xffffffff>; + qcom,sde-dspp-aiqe-version = <0x00010000>; + qcom,sde-dspp-aiqe-size = <0x3fc>; + + qcom,sde-dspp-aiqe-dither-off = <0x39700 0xffffffff 0x3a700 0xffffffff>; + qcom,sde-dspp-aiqe-dither-version = <0x00010000>; + qcom,sde-dspp-aiqe-dither-size = <0x20>; + + qcom,sde-dspp-aiqe-wrapper-off = <0x39780 0xffffffff 0x3a780 0xffffffff>; + qcom,sde-dspp-aiqe-wrapper-version = <0x00010000>; + qcom,sde-dspp-aiqe-wrapper-size = <0x1c>; + + qcom,sde-aiqe-has-feature-mdnie; + qcom,sde-aiqe-has-feature-abc; + qcom,sde-aiqe-has-feature-ssrc; + qcom,sde-aiqe-has-feature-copr; + qcom,sde-lm-noise-off = <0x320>; qcom,sde-lm-noise-version = <0x00010000>; diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi index 0e65dc00..3d9db11a 100644 --- a/display/sun-sde-display-cdp.dtsi +++ b/display/sun-sde-display-cdp.dtsi @@ -174,6 +174,7 @@ }; &qupv3_se15_i2c { + status = "disabled"; st_fts@49 { panel = <&dsi_nt37801_amoled_cmd &dsi_nt37801_amoled_cmd_cphy diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index aebc8612..0f22bc80 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -358,6 +358,32 @@ }; }; +&dsi_nt37801_amoled_video_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 25 25 08 + 19 09 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_nt37801_amoled_cmd_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 23 22 08 + 19 08 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_nt37801_amoled_video { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; diff --git a/display/sun-sde-display-qrd-sku1-overlay.dts b/display/sun-sde-display-qrd-sku1-overlay.dts new file mode 100644 index 00000000..2479ab77 --- /dev/null +++ b/display/sun-sde-display-qrd-sku1-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun QRD SKU1"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", + "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x1000B 0>; +}; diff --git a/display/sun-sde-display-qrd-sku1-v8-overlay.dts b/display/sun-sde-display-qrd-sku1-v8-overlay.dts new file mode 100644 index 00000000..4780320d --- /dev/null +++ b/display/sun-sde-display-qrd-sku1-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", + "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x3000B 0>; +}; diff --git a/display/sun-sde-display-qrd-sku2-v8-overlay.dts b/display/sun-sde-display-qrd-sku2-v8-overlay.dts new file mode 100644 index 00000000..0820a163 --- /dev/null +++ b/display/sun-sde-display-qrd-sku2-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", + "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x2000B 0>; +}; diff --git a/display/sun-sde-display-qrd.dtsi b/display/sun-sde-display-qrd.dtsi new file mode 100644 index 00000000..3d730f68 --- /dev/null +++ b/display/sun-sde-display-qrd.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-sde-display.dtsi" + +&dsi_nt37801_amoled_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_cmd_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_video_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&sde_dsi { + qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd_cphy>; +}; diff --git a/display/sun-sde-display.dtsi b/display/sun-sde-display.dtsi index 67eb583c..819dd5ee 100644 --- a/display/sun-sde-display.dtsi +++ b/display/sun-sde-display.dtsi @@ -107,7 +107,7 @@ }; &mdss_mdp { - connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &sde_wb1 &sde_wb2>; + connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &sde_wb1 &sde_wb2 &sde_dp>; }; &dsi_vtdr6130_amoled_cmd { diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 0a76d14e..ae31c68c 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -13,6 +13,174 @@ #include "sun-sde-common.dtsi" &soc { + ext_disp: qcom,msm-ext-disp { + compatible = "qcom,msm-ext-disp"; + + ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { + compatible = "qcom,msm-ext-disp-audio-codec-rx"; + }; + }; + + qcom_msmhdcp: qcom,msm_hdcp { + compatible = "qcom,msm-hdcp"; + }; + + sde_dp_pll: qcom,dp_pll@88eb000 { + compatible = "qcom,dp-pll-3nm-v1"; + #clock-cells = <1>; + }; + + sde_dp: qcom,dp_display@af54000 { + cell-index = <0>; + compatible = "qcom,dp-display"; + + usb-phy = <&usb_qmp_dp_phy>; + qcom,ext-disp = <&ext_disp>; + usb-controller = <&usb0>; + qcom,altmode-dev = <&altmode 0>; + qcom,dp-aux-switch = <&wcd_usbss>; + + reg = <0xaf54000 0x104>, + <0xaf54200 0x0c0>, + <0xaf55000 0x770>, + <0xaf56000 0x09c>, + <0x88ebc00 0x200>, + <0x88eb400 0x200>, + <0x88eb800 0x200>, + <0x88eb000 0x200>, + <0x88e8000 0x020>, + <0xaee1000 0x034>, + <0xaf57000 0x09c>, + <0xaf09000 0x014>; + reg-names = "dp_ahb", "dp_aux", "dp_link", + "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", + "dp_pll", "usb3_dp_com", "hdcp_physical", + "dp_p1", "gdsc"; + + interrupt-parent = <&mdss_mdp>; + interrupts = <12 0>; + + #clock-cells = <1>; + clocks = <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&tcsrcc TCSR_USB3_CLKREF_EN>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&sde_dp_pll 0>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>, + <&sde_dp_pll 1>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>; + clock-names = "core_aux_clk", "rpmh_cxo_clk", "core_usb_ref_clk_src", + "core_usb_pipe_clk", "link_clk", "link_clk_src", "link_parent", + "link_iface_clk", "pixel_clk_rcg", "pixel_parent", + "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; + + qcom,dp-pll = <&sde_dp_pll>; + qcom,phy-version = <0x800>; + qcom,aux-cfg0-settings = [20 00]; + qcom,aux-cfg1-settings = [24 13]; + qcom,aux-cfg2-settings = [28 A4]; + qcom,aux-cfg3-settings = [2c 00]; + qcom,aux-cfg4-settings = [30 0a]; + qcom,aux-cfg5-settings = [34 26]; + qcom,aux-cfg6-settings = [38 0a]; + qcom,aux-cfg7-settings = [3c 03]; + qcom,aux-cfg8-settings = [40 b7]; + qcom,aux-cfg9-settings = [44 03]; + + qcom,max-pclk-frequency-khz = <675000>; + + qcom,widebus-enable; + qcom,mst-enable; + qcom,dsc-feature-enable; + qcom,fec-feature-enable; + qcom,dsc-continuous-pps; + + qcom,qos-cpu-mask = <0xf>; + qcom,qos-cpu-latency-us = <300>; + + vdda-1p2-supply = <&L3G>; + vdda-0p9-supply = <&L2D>; + vdda_usb-0p9-supply = <&L2D>; + vdd_mx-supply = <&VDD_MXA_LEVEL>; + dp_phy_gdsc-supply = <&gcc_usb3_phy_gdsc>; + + qcom,hbr-rbr-voltage-swing = <0x27 0x2f 0x36 0x3f>, + <0x31 0x3e 0x3f 0xff>, + <0x36 0x3f 0xff 0xff>, + <0x3f 0xff 0xff 0xff>; + qcom,hbr-rbr-pre-emphasis = <0x20 0x2d 0x34 0x3a>, + <0x20 0x2e 0x35 0xff>, + <0x20 0x2e 0xff 0xff>, + <0x22 0xff 0xff 0xff>; + + qcom,hbr2-3-voltage-swing = <0x22 0x32 0x36 0x3a>, + <0x29 0x39 0x3f 0xff>, + <0x30 0x3f 0xff 0xff>, + <0x3f 0xff 0xff 0xff>; + qcom,hbr2-3-pre-emphasis = <0x20 0x2c 0x35 0x3b>, + <0x22 0x2e 0x36 0xff>, + <0x22 0x31 0xff 0xff>, + <0x24 0xff 0xff 0xff>; + + qcom,ctrl-supply-entries { + #address-cells = <1>; + #size-cells = <0>; + + qcom,ctrl-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vdda-1p2"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <30000>; + qcom,supply-disable-load = <0>; + }; + }; + + qcom,phy-supply-entries { + #address-cells = <1>; + #size-cells = <0>; + + qcom,phy-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vdda-0p9"; + qcom,supply-min-voltage = <912000>; + qcom,supply-max-voltage = <912000>; + qcom,supply-enable-load = <114000>; + qcom,supply-disable-load = <0>; + }; + + qcom,phy-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vdda_usb-0p9"; + qcom,supply-min-voltage = <880000>; + qcom,supply-max-voltage = <880000>; + qcom,supply-enable-load = <2500>; + qcom,supply-disable-load = <0>; + }; + }; + + qcom,pll-supply-entries { + #address-cells = <1>; + #size-cells = <0>; + + qcom,pll-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vdd_mx"; + qcom,supply-min-voltage = + ; + qcom,supply-max-voltage = + ; + qcom,supply-enable-load = <0>; + qcom,supply-disable-load = <0>; + }; + }; + }; + smmu_sde_unsec: qcom,smmu_sde_unsec_cb { compatible = "qcom,smmu_sde_unsec"; iommus = <&apps_smmu 0x800 0x2>;