From 3f35daf3cf3a0b17b176acc1feb7a7d170bf521b Mon Sep 17 00:00:00 2001 From: Yahui Wang Date: Tue, 7 Nov 2023 17:11:43 +0800 Subject: [PATCH 01/22] ARM: dts: msm: add dp dt change for sun platform Add dp device tree change for sun platform. Change-Id: I56d1d7e542fa4de971d5803dc4a40a66ea34dcf3 Signed-off-by: Yahui Wang --- display/sun-sde.dtsi | 154 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 154 insertions(+) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 166f64f7..29d03668 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -12,6 +12,160 @@ #include "sun-sde-common.dtsi" &soc { + ext_disp: qcom,msm-ext-disp { + compatible = "qcom,msm-ext-disp"; + }; + + sde_dp: qcom,dp_display@af54000 { + status = "disabled"; + cell-index = <0>; + compatible = "qcom,dp-display"; + + usb-phy = <&usb_qmp_dp_phy>; + qcom,ext-disp = <&ext_disp>; + usb-controller = <&usb0>; + + reg = <0xaf54000 0x104>, + <0xaf54200 0x0c0>, + <0xaf55000 0x770>, + <0xaf56000 0x09c>, + <0x88ebc00 0x200>, + <0x88eb400 0x200>, + <0x88eb800 0x200>, + <0x88eb000 0x200>, + <0x88e8000 0x020>, + <0xaee1000 0x034>, + <0xaf57000 0x09c>, + <0xaf09000 0x014>; + reg-names = "dp_ahb", "dp_aux", "dp_link", + "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", + "dp_pll", "usb3_dp_com", "hdcp_physical", + "dp_p1", "gdsc"; + + interrupt-parent = <&mdss_mdp>; + interrupts = <12 0>; + + #clock-cells = <1>; + clocks = <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&tcsrcc TCSR_USB3_CLKREF_EN>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&sde_dp 0>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>, + <&sde_dp 1>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>; + clock-names = "core_aux_clk", "rpmh_cxo_clk", "core_usb_ref_clk_src", + "core_usb_pipe_clk", "link_clk", "link_clk_src", "link_parent", + "link_iface_clk", "pixel_clk_rcg", "pixel_parent", + "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; + + qcom,pll-revision = "3nm-v1"; + qcom,phy-version = <0x800>; + qcom,aux-cfg0-settings = [20 00]; + qcom,aux-cfg1-settings = [24 13]; + qcom,aux-cfg2-settings = [28 A4]; + qcom,aux-cfg3-settings = [2c 00]; + qcom,aux-cfg4-settings = [30 0a]; + qcom,aux-cfg5-settings = [34 26]; + qcom,aux-cfg6-settings = [38 0a]; + qcom,aux-cfg7-settings = [3c 03]; + qcom,aux-cfg8-settings = [40 b7]; + qcom,aux-cfg9-settings = [44 03]; + + qcom,max-pclk-frequency-khz = <675000>; + + qcom,widebus-enable; + qcom,mst-enable; + qcom,dsc-feature-enable; + qcom,fec-feature-enable; + qcom,dsc-continuous-pps; + + qcom,qos-cpu-mask = <0xf>; + qcom,qos-cpu-latency-us = <300>; + + vdda-1p2-supply = <&L3G>; + vdda-0p9-supply = <&L2D>; + vdda_usb-0p9-supply = <&L2D>; + vdd_mx-supply = <&VDD_MXA_LEVEL>; + dp_phy_gdsc-supply = <&gcc_usb3_phy_gdsc>; + + qcom,hbr-rbr-voltage-swing = <0x27 0x2f 0x36 0x3f>, + <0x31 0x3e 0x3f 0xff>, + <0x36 0x3f 0xff 0xff>, + <0x3f 0xff 0xff 0xff>; + qcom,hbr-rbr-pre-emphasis = <0x20 0x2d 0x34 0x3a>, + <0x20 0x2e 0x35 0xff>, + <0x20 0x2e 0xff 0xff>, + <0x22 0xff 0xff 0xff>; + + qcom,hbr2-3-voltage-swing = <0x22 0x32 0x36 0x3a>, + <0x29 0x39 0x3f 0xff>, + <0x30 0x3f 0xff 0xff>, + <0x3f 0xff 0xff 0xff>; + qcom,hbr2-3-pre-emphasis = <0x20 0x2c 0x35 0x3b>, + <0x22 0x2e 0x36 0xff>, + <0x22 0x31 0xff 0xff>, + <0x24 0xff 0xff 0xff>; + + qcom,ctrl-supply-entries { + #address-cells = <1>; + #size-cells = <0>; + + qcom,ctrl-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vdda-1p2"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <30000>; + qcom,supply-disable-load = <0>; + }; + }; + + qcom,phy-supply-entries { + #address-cells = <1>; + #size-cells = <0>; + + qcom,phy-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vdda-0p9"; + qcom,supply-min-voltage = <912000>; + qcom,supply-max-voltage = <912000>; + qcom,supply-enable-load = <114000>; + qcom,supply-disable-load = <0>; + }; + + qcom,phy-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vdda_usb-0p9"; + qcom,supply-min-voltage = <880000>; + qcom,supply-max-voltage = <880000>; + qcom,supply-enable-load = <2500>; + qcom,supply-disable-load = <0>; + }; + }; + + qcom,pll-supply-entries { + #address-cells = <1>; + #size-cells = <0>; + + qcom,pll-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vdd_mx"; + qcom,supply-min-voltage = + ; + qcom,supply-max-voltage = + ; + qcom,supply-enable-load = <0>; + qcom,supply-disable-load = <0>; + }; + }; + }; + smmu_sde_unsec: qcom,smmu_sde_unsec_cb { compatible = "qcom,smmu_sde_unsec"; iommus = <&apps_smmu 0x800 0x2>; From 46f32bb8da40faa0dec33c3a86994e9dce85eaa6 Mon Sep 17 00:00:00 2001 From: Yahui Wang Date: Fri, 24 Nov 2023 20:33:32 +0800 Subject: [PATCH 02/22] ARM: dts: msm: enable dp hdcp/pll/audio codec for sun Enable dp hdcp/pll/audio codec for sun. Change-Id: Ibdc94b27e4b8d1cb558656c9374d18b7b6266460 Signed-off-by: Yahui Wang --- display/sun-sde.dtsi | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 29d03668..a79a31a8 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -14,16 +14,30 @@ &soc { ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; + + ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { + compatible = "qcom,msm-ext-disp-audio-codec-rx"; + }; + }; + + qcom_msmhdcp: qcom,msm_hdcp { + compatible = "qcom,msm-hdcp"; + }; + + sde_dp_pll: qcom,dp_pll@88eb000 { + compatible = "qcom,dp-pll-3nm-v1"; + #clock-cells = <1>; }; sde_dp: qcom,dp_display@af54000 { - status = "disabled"; cell-index = <0>; compatible = "qcom,dp-display"; usb-phy = <&usb_qmp_dp_phy>; qcom,ext-disp = <&ext_disp>; usb-controller = <&usb0>; + qcom,altmode-dev = <&altmode 0>; + qcom,dp-aux-switch = <&wcd_usbss>; reg = <0xaf54000 0x104>, <0xaf54200 0x0c0>, @@ -52,10 +66,10 @@ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, - <&sde_dp 0>, + <&sde_dp_pll 0>, <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>, - <&sde_dp 1>, + <&sde_dp_pll 1>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>; @@ -64,7 +78,7 @@ "link_iface_clk", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; - qcom,pll-revision = "3nm-v1"; + qcom,dp-pll = <&sde_dp_pll>; qcom,phy-version = <0x800>; qcom,aux-cfg0-settings = [20 00]; qcom,aux-cfg1-settings = [24 13]; From 7dd76e1b107fab65a9ecec059d81412d07ebfe0f Mon Sep 17 00:00:00 2001 From: Yahui Wang Date: Fri, 24 Nov 2023 20:37:38 +0800 Subject: [PATCH 03/22] ARM: dts: msm: add sde_dp node to connectors list for sun Add sde_dp node to connectors list for sun. Change-Id: Iccc9911b6ac1f9da8807009fb3a3d520eea68aea Signed-off-by: Yahui Wang --- display/sun-sde-display.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/display/sun-sde-display.dtsi b/display/sun-sde-display.dtsi index 67eb583c..819dd5ee 100644 --- a/display/sun-sde-display.dtsi +++ b/display/sun-sde-display.dtsi @@ -107,7 +107,7 @@ }; &mdss_mdp { - connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &sde_wb1 &sde_wb2>; + connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &sde_wb1 &sde_wb2 &sde_dp>; }; &dsi_vtdr6130_amoled_cmd { From ae736009b3aedc6146fdeaa1d0d6f5a1c0c5049a Mon Sep 17 00:00:00 2001 From: Rohith Iyer Date: Thu, 30 Nov 2023 15:25:35 -0800 Subject: [PATCH 04/22] ARM: dts: msm: dsi: add panel commands to reduce load on VCI power rail Add panel commands to nt37801 panel's configurations which program BTPUMPCTRL to reduce the load on VCI power rail to 1 mA. Change-Id: Iad4d74db8195175f82f06574145db40306897bd8 Signed-off-by: Rohith Iyer --- display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi | 2 ++ display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi | 2 ++ display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi | 2 ++ display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi | 2 ++ 4 files changed, 8 insertions(+) diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi index eacca56f..25357b7c 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi @@ -87,6 +87,8 @@ 39 01 00 00 00 00 05 FF AA 55 A5 82 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 F3 CC 0C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi index 92004657..a9bda899 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi @@ -83,6 +83,8 @@ 39 01 00 00 00 00 02 9C 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 02 2F 00 + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi index 65b22528..83152a0e 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi @@ -87,6 +87,8 @@ 39 01 00 00 00 00 05 FF AA 55 A5 82 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 F3 CC 0C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi index 0bab8128..652cd619 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi @@ -84,6 +84,8 @@ 39 01 00 00 00 00 02 9C 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 02 2f 00 + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 05 01 00 00 78 00 01 11 05 01 00 00 14 00 01 29 ]; From 3cf30c9b549d2a28a0342284863a7747d8f8a20f Mon Sep 17 00:00:00 2001 From: Rohith Iyer Date: Wed, 29 Nov 2023 15:02:44 -0800 Subject: [PATCH 05/22] ARM: dts: msm: dsi: disable secondary touch node Disable secondary touch node as there are currently i2c errors from that address causing st_fts touch driver to enter error case and fail probe. Change-Id: I7b9427c0aedd17f8cfda9fdd4966d125369edf61 Signed-off-by: Rohith Iyer --- display/sun-sde-display-cdp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi index 0e65dc00..3d9db11a 100644 --- a/display/sun-sde-display-cdp.dtsi +++ b/display/sun-sde-display-cdp.dtsi @@ -174,6 +174,7 @@ }; &qupv3_se15_i2c { + status = "disabled"; st_fts@49 { panel = <&dsi_nt37801_amoled_cmd &dsi_nt37801_amoled_cmd_cphy From f790be71615dc83cb4b9183daca3f6bae5b7b125 Mon Sep 17 00:00:00 2001 From: Rohith Iyer Date: Tue, 5 Dec 2023 14:52:23 -0800 Subject: [PATCH 06/22] ARM: dts: msm: dsi: fix indices on mdss_dsi_phy* providers Since mdss_dsi_phy* providers only support two clocks, fix current implementation which indexes out of bounds and causes a failure in dsi when trying to get clocks. Change-Id: I671b1f4032c124a515c4d5cebbbd098fdfaca95e Signed-off-by: Rohith Iyer --- display/sun-sde-display.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/display/sun-sde-display.dtsi b/display/sun-sde-display.dtsi index 819dd5ee..d48d6045 100644 --- a/display/sun-sde-display.dtsi +++ b/display/sun-sde-display.dtsi @@ -51,8 +51,8 @@ &sde_dsi { clocks = <&mdss_dsi_phy0 0>, <&mdss_dsi_phy0 1>, - <&mdss_dsi_phy1 2>, - <&mdss_dsi_phy1 3>, + <&mdss_dsi_phy1 0>, + <&mdss_dsi_phy1 1>, /* * Currently the dsi clock handles are under the dsi * controller DT node. As soon as the controller probe @@ -80,8 +80,8 @@ &sde_dsi1 { clocks = <&mdss_dsi_phy0 0>, <&mdss_dsi_phy0 1>, - <&mdss_dsi_phy1 2>, - <&mdss_dsi_phy1 3>, + <&mdss_dsi_phy1 0>, + <&mdss_dsi_phy1 1>, /* * Currently the dsi clock handles are under the dsi * controller DT node. As soon as the controller probe From 9779d94585c8657248cd99732105dc4813733e1e Mon Sep 17 00:00:00 2001 From: Lei Chen Date: Fri, 10 Nov 2023 13:25:10 +0800 Subject: [PATCH 07/22] ARM: dts: msm: add display device tree support for QRD SUN variants Add display device tree support for QRD SUN variants. Change-Id: I0f6f9914904d0ddf26bff2149ce490b69a1259b8 Signed-off-by: Lei Chen --- Kbuild | 5 +- display/sun-sde-display-common.dtsi | 26 ++++++++++ display/sun-sde-display-qrd-sku1-overlay.dts | 17 +++++++ .../sun-sde-display-qrd-sku1-v8-overlay.dts | 17 +++++++ .../sun-sde-display-qrd-sku2-v8-overlay.dts | 17 +++++++ display/sun-sde-display-qrd.dtsi | 50 +++++++++++++++++++ 6 files changed, 131 insertions(+), 1 deletion(-) create mode 100644 display/sun-sde-display-qrd-sku1-overlay.dts create mode 100644 display/sun-sde-display-qrd-sku1-v8-overlay.dts create mode 100644 display/sun-sde-display-qrd-sku2-v8-overlay.dts create mode 100644 display/sun-sde-display-qrd.dtsi diff --git a/Kbuild b/Kbuild index 762643b2..d078accc 100644 --- a/Kbuild +++ b/Kbuild @@ -1,7 +1,10 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-cdp-overlay.dtbo \ display/sun-sde-display-mtp-overlay.dtbo \ - display/sun-sde-display-rumi-overlay.dtbo + display/sun-sde-display-rumi-overlay.dtbo \ + display/sun-sde-display-qrd-sku1-overlay.dtbo \ + display/sun-sde-display-qrd-sku1-v8-overlay.dtbo \ + display/sun-sde-display-qrd-sku2-v8-overlay.dtbo always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index aebc8612..0f22bc80 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -358,6 +358,32 @@ }; }; +&dsi_nt37801_amoled_video_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 25 25 08 + 19 09 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_nt37801_amoled_cmd_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 23 22 08 + 19 08 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_nt37801_amoled_video { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; diff --git a/display/sun-sde-display-qrd-sku1-overlay.dts b/display/sun-sde-display-qrd-sku1-overlay.dts new file mode 100644 index 00000000..2479ab77 --- /dev/null +++ b/display/sun-sde-display-qrd-sku1-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun QRD SKU1"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", + "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x1000B 0>; +}; diff --git a/display/sun-sde-display-qrd-sku1-v8-overlay.dts b/display/sun-sde-display-qrd-sku1-v8-overlay.dts new file mode 100644 index 00000000..4780320d --- /dev/null +++ b/display/sun-sde-display-qrd-sku1-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", + "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x3000B 0>; +}; diff --git a/display/sun-sde-display-qrd-sku2-v8-overlay.dts b/display/sun-sde-display-qrd-sku2-v8-overlay.dts new file mode 100644 index 00000000..0820a163 --- /dev/null +++ b/display/sun-sde-display-qrd-sku2-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid"; + compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", + "qcom,qrd"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x2000B 0>; +}; diff --git a/display/sun-sde-display-qrd.dtsi b/display/sun-sde-display-qrd.dtsi new file mode 100644 index 00000000..3d730f68 --- /dev/null +++ b/display/sun-sde-display-qrd.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-sde-display.dtsi" + +&dsi_nt37801_amoled_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_cmd_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_video_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&sde_dsi { + qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd_cphy>; +}; From c6a758b4241fb44f8a664b4f4a3f169a5dd38261 Mon Sep 17 00:00:00 2001 From: Alisha Thapaliya Date: Mon, 20 Nov 2023 00:03:47 -0800 Subject: [PATCH 08/22] ARM: dts: msm: introduce mDNIe support The Sun platform introduces support for mDNIe hardware. Update the device tree definition to provide mDNIe hardware details and register access to the MSM DRM driver. Change-Id: I783d7baeca2886c08329feeeef4f8a1c445ddbb7 Signed-off-by: Alisha Thapaliya --- bindings/sde.txt | 42 +++++++++++++++++++++++++++++++++++++ display/sun-sde-common.dtsi | 17 +++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/bindings/sde.txt b/bindings/sde.txt index c088ece5..2abbe5a5 100644 --- a/bindings/sde.txt +++ b/bindings/sde.txt @@ -387,6 +387,31 @@ Optional properties: corresponding DSPP block offset as base. - qcom,sde-dspp-demura-size: A u32 value indicating the demura block register address range - qcom,sde-dspp-demura-version: A u32 value indicating the version of demura hardware. +- qcom,sde-dspp-aiqe-off: Array of u32 values indicating the offset of each AIQE block + relative to its parent DSPP block. +- qcom,sde-dspp-aiqe-version: A u32 value indicating the version of the AIQE hardware. +- qcom,sde-dspp-aiqe-size: A u32 value indicating the shared memory size of each AIQE + hardware block instance. +- qcom,sde-dspp-aiqe-dither-off: Array of u32 values indicating the offset of each AIQE + dither block relative to its parent DSPP block. +- qcom,sde-dspp-aiqe-dither-version: A u32 value indicating the version of the AIQE dither + hardware. +- qcom,sde-dspp-aiqe-dither-size: A u32 value indicating the shared memory size of each AIQE + dither hardware block instance. +- qcom,sde-dspp-aiqe-wrapper-off: Array of u32 values indicating the offset of each AIQE + wrapper block relative to its parent DSPP block. +- qcom,sde-dspp-aiqe-wrapper-version: A u32 value indicating the version of the AIQE wrapper + hardware. +- qcom,sde-dspp-aiqe-wrapper-size: A u32 value indicating the shared memory size of each AIQE + wrapper hardware block instance. +- qcom,sde-aiqe-has-feature-mdnie: Boolean property indicating the presence of AIQE feature mDNIe + hardware. +- qcom,sde-aiqe-has-feature-abc: Boolean property indicating the presence of AIQE feature ABC + hardware. +- qcom,sde-aiqe-has-feature-ssrc: Boolean property indicating the presence of AIQE feature SSRC + hardware. +- qcom,sde-aiqe-has-feature-copr: Boolean property indicating the presence of AIQE feature COPR + hardware. - qcom,sde-lm-noise-off: A u32 value indicating noise layer offset from mixer base. - qcom,sde-lm-noise-version: A u32 value indicating the noise layer version. - qcom,sde-vbif-id: Array of vbif ids corresponding to the @@ -710,6 +735,23 @@ Example: qcom,sde-lm-noise-off = <0x320>; qcom,sde-lm-noise-version = <0x00010000>; + qcom,sde-dspp-aiqe-off = <0x39000 0xffffffff 0x3a000 0xffffffff>; + qcom,sde-dspp-aiqe-version = <0x00010000>; + qcom,sde-dspp-aiqe-size = <0x3fc>; + + qcom,sde-dspp-aiqe-dither-off = <0x39700 0xffffffff 0x3a700 0xffffffff>; + qcom,sde-dspp-aiqe-dither-version = <0x00010000>; + qcom,sde-dspp-aiqe-dither-size = <0x20>; + + qcom,sde-dspp-aiqe-wrapper-off = <0x39780 0xffffffff 0x3a780 0xffffffff>; + qcom,sde-dspp-aiqe-wrapper-version = <0x00010000>; + qcom,sde-dspp-aiqe-wrapper-size = <0x1c>; + + qcom,sde-aiqe-has-feature-mdnie; + qcom,sde-aiqe-has-feature-abc; + qcom,sde-aiqe-has-feature-ssrc; + qcom,sde-aiqe-has-feature-copr; + qcom,sde-dspp-rc-mem-size = <2720>; qcom,sde-dest-scaler-top-off = <0x00061000>; qcom,sde-dest-scaler-off = <0x800 0x1000>; diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index 1a6143bc..c517fc02 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -193,6 +193,23 @@ qcom,sde-dspp-demura-size = <0xe4>; qcom,sde-dspp-demura-version = <0x00020000>; + qcom,sde-dspp-aiqe-off = <0x39000 0xffffffff 0x3a000 0xffffffff>; + qcom,sde-dspp-aiqe-version = <0x00010000>; + qcom,sde-dspp-aiqe-size = <0x3fc>; + + qcom,sde-dspp-aiqe-dither-off = <0x39700 0xffffffff 0x3a700 0xffffffff>; + qcom,sde-dspp-aiqe-dither-version = <0x00010000>; + qcom,sde-dspp-aiqe-dither-size = <0x20>; + + qcom,sde-dspp-aiqe-wrapper-off = <0x39780 0xffffffff 0x3a780 0xffffffff>; + qcom,sde-dspp-aiqe-wrapper-version = <0x00010000>; + qcom,sde-dspp-aiqe-wrapper-size = <0x1c>; + + qcom,sde-aiqe-has-feature-mdnie; + qcom,sde-aiqe-has-feature-abc; + qcom,sde-aiqe-has-feature-ssrc; + qcom,sde-aiqe-has-feature-copr; + qcom,sde-lm-noise-off = <0x320>; qcom,sde-lm-noise-version = <0x00010000>; From a959cdec45b98fbf8aef9a2eb5307cf97be7965f Mon Sep 17 00:00:00 2001 From: Kirill Shpin Date: Wed, 6 Dec 2023 17:39:45 -0800 Subject: [PATCH 09/22] ARM: dts: msm: add RCM device tree files Adds new files for RCM CDT, which falls back on the CDP files for configuration. Change-Id: I323099abc2cab872e665d3d21bdee94d4ae9f5cf Signed-off-by: Kirill Shpin --- Kbuild | 1 + display/sun-sde-display-rcm-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-rcm.dtsi | 6 ++++++ 3 files changed, 23 insertions(+) create mode 100644 display/sun-sde-display-rcm-overlay.dts create mode 100644 display/sun-sde-display-rcm.dtsi diff --git a/Kbuild b/Kbuild index d078accc..649aa4ce 100644 --- a/Kbuild +++ b/Kbuild @@ -2,6 +2,7 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-cdp-overlay.dtbo \ display/sun-sde-display-mtp-overlay.dtbo \ display/sun-sde-display-rumi-overlay.dtbo \ + display/sun-sde-display-rcm-overlay.dtbo \ display/sun-sde-display-qrd-sku1-overlay.dtbo \ display/sun-sde-display-qrd-sku1-v8-overlay.dtbo \ display/sun-sde-display-qrd-sku2-v8-overlay.dtbo diff --git a/display/sun-sde-display-rcm-overlay.dts b/display/sun-sde-display-rcm-overlay.dts new file mode 100644 index 00000000..4236e89b --- /dev/null +++ b/display/sun-sde-display-rcm-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun RCM"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,rcm"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x15 0>; +}; diff --git a/display/sun-sde-display-rcm.dtsi b/display/sun-sde-display-rcm.dtsi new file mode 100644 index 00000000..4566cd46 --- /dev/null +++ b/display/sun-sde-display-rcm.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-sde-display-cdp.dtsi" From 9ab8a2cac05cb28b153186f374e36bd58aeb711c Mon Sep 17 00:00:00 2001 From: Veera Sundaram Sankaran Date: Wed, 29 Nov 2023 11:34:17 -0800 Subject: [PATCH 10/22] ARM: dts: msm: add all supported platform variants for sun target Add Kiwi, NFC, v8 Power Grid, v8 Power Grid with Kiwi on MTP & CDP platforms for Sun target. Change-Id: I3cd60571147aa566aa11aad4f49829b19d928983 Signed-off-by: Veera Sundaram Sankaran --- Kbuild | 10 +++++++++- display/sun-sde-display-cdp-kiwi-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-cdp-kiwi-v8-overlay.dts | 17 +++++++++++++++++ display/sun-sde-display-cdp-nfc-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-cdp-v8-overlay.dts | 17 +++++++++++++++++ display/sun-sde-display-mtp-kiwi-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-mtp-kiwi-v8-overlay.dts | 17 +++++++++++++++++ display/sun-sde-display-mtp-nfc-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-mtp-v8-overlay.dts | 17 +++++++++++++++++ 9 files changed, 141 insertions(+), 1 deletion(-) create mode 100644 display/sun-sde-display-cdp-kiwi-overlay.dts create mode 100644 display/sun-sde-display-cdp-kiwi-v8-overlay.dts create mode 100644 display/sun-sde-display-cdp-nfc-overlay.dts create mode 100644 display/sun-sde-display-cdp-v8-overlay.dts create mode 100644 display/sun-sde-display-mtp-kiwi-overlay.dts create mode 100644 display/sun-sde-display-mtp-kiwi-v8-overlay.dts create mode 100644 display/sun-sde-display-mtp-nfc-overlay.dts create mode 100644 display/sun-sde-display-mtp-v8-overlay.dts diff --git a/Kbuild b/Kbuild index d078accc..46f59d76 100644 --- a/Kbuild +++ b/Kbuild @@ -4,7 +4,15 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-rumi-overlay.dtbo \ display/sun-sde-display-qrd-sku1-overlay.dtbo \ display/sun-sde-display-qrd-sku1-v8-overlay.dtbo \ - display/sun-sde-display-qrd-sku2-v8-overlay.dtbo + display/sun-sde-display-qrd-sku2-v8-overlay.dtbo \ + display/sun-sde-display-cdp-kiwi-overlay.dtbo \ + display/sun-sde-display-mtp-kiwi-overlay.dtbo \ + display/sun-sde-display-cdp-kiwi-v8-overlay.dtbo \ + display/sun-sde-display-mtp-kiwi-v8-overlay.dtbo \ + display/sun-sde-display-cdp-nfc-overlay.dtbo \ + display/sun-sde-display-mtp-nfc-overlay.dtbo \ + display/sun-sde-display-cdp-v8-overlay.dtbo \ + display/sun-sde-display-mtp-v8-overlay.dtbo always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) diff --git a/display/sun-sde-display-cdp-kiwi-overlay.dts b/display/sun-sde-display-cdp-kiwi-overlay.dts new file mode 100644 index 00000000..acfc23ea --- /dev/null +++ b/display/sun-sde-display-cdp-kiwi-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x20001 0>; +}; diff --git a/display/sun-sde-display-cdp-kiwi-v8-overlay.dts b/display/sun-sde-display-cdp-kiwi-v8-overlay.dts new file mode 100644 index 00000000..fba63430 --- /dev/null +++ b/display/sun-sde-display-cdp-kiwi-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN V8 Power Grid"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", + "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x60001 0>; +}; diff --git a/display/sun-sde-display-cdp-nfc-overlay.dts b/display/sun-sde-display-cdp-nfc-overlay.dts new file mode 100644 index 00000000..f9aba3ab --- /dev/null +++ b/display/sun-sde-display-cdp-nfc-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun CDP SN300 NFC"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x40001 0>; +}; diff --git a/display/sun-sde-display-cdp-v8-overlay.dts b/display/sun-sde-display-cdp-v8-overlay.dts new file mode 100644 index 00000000..dee0d9e7 --- /dev/null +++ b/display/sun-sde-display-cdp-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun CDP V8 Power Grid"; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", + "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x50001 0>; +}; diff --git a/display/sun-sde-display-mtp-kiwi-overlay.dts b/display/sun-sde-display-mtp-kiwi-overlay.dts new file mode 100644 index 00000000..6d755f25 --- /dev/null +++ b/display/sun-sde-display-mtp-kiwi-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x20008 0>; +}; diff --git a/display/sun-sde-display-mtp-kiwi-v8-overlay.dts b/display/sun-sde-display-mtp-kiwi-v8-overlay.dts new file mode 100644 index 00000000..c354a996 --- /dev/null +++ b/display/sun-sde-display-mtp-kiwi-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN V8 Power Grid"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", + "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x50008 0>; +}; diff --git a/display/sun-sde-display-mtp-nfc-overlay.dts b/display/sun-sde-display-mtp-nfc-overlay.dts new file mode 100644 index 00000000..544c30fe --- /dev/null +++ b/display/sun-sde-display-mtp-nfc-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP SN300 NFC"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x30008 0>; +}; diff --git a/display/sun-sde-display-mtp-v8-overlay.dts b/display/sun-sde-display-mtp-v8-overlay.dts new file mode 100644 index 00000000..3cfae533 --- /dev/null +++ b/display/sun-sde-display-mtp-v8-overlay.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP V8 Power Grid"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", + "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x40008 0>; +}; From 5087f5eb21adc2235e4e2067eea155cf4f96b1aa Mon Sep 17 00:00:00 2001 From: Rohith Iyer Date: Wed, 29 Nov 2023 17:06:17 -0800 Subject: [PATCH 11/22] ARM: dts: msm: dsi: support secondary display for nt37801 panel Add properties to support secondary display on CDP for both command and video mode for nt37801 panel. Change-Id: I040bece2ae656606f76e13c59e67b08cd730dea2 Signed-off-by: Rohith Iyer Signed-off-by: Kirill Shpin --- display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi | 2 ++ display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi | 2 ++ display/sun-sde-display-cdp.dtsi | 6 ++++++ display/sun-sde-display-common.dtsi | 2 ++ 4 files changed, 12 insertions(+) diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi index a9bda899..61437024 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi @@ -13,6 +13,8 @@ qcom,dsi-ctrl-num = <0>; qcom,dsi-phy-num = <0>; + qcom,dsi-sec-ctrl-num = <1>; + qcom,dsi-sec-phy-num = <1>; qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; qcom,mdss-dsi-lane-map = "lane_map_0123"; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi index 652cd619..70ba9540 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi @@ -10,6 +10,8 @@ qcom,mdss-dsi-border-color = <0>; qcom,dsi-ctrl-num = <0>; qcom,dsi-phy-num = <0>; + qcom,dsi-sec-ctrl-num = <1>; + qcom,dsi-sec-phy-num = <1>; qcom,mdss-dsi-traffic-mode = "burst_mode"; qcom,mdss-dsi-bllp-eof-power-mode; qcom,mdss-dsi-bllp-power-mode; diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi index 3d9db11a..7c979c54 100644 --- a/display/sun-sde-display-cdp.dtsi +++ b/display/sun-sde-display-cdp.dtsi @@ -43,22 +43,28 @@ &dsi_nt37801_amoled_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 98 0>; + qcom,platform-sec-reset-gpio = <&tlmm 97 0>; }; &dsi_nt37801_amoled_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 98 0>; + qcom,platform-sec-reset-gpio = <&tlmm 97 0>; }; &dsi_vtdr6130_amoled_120hz_video { diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 0f22bc80..765cc2d4 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -347,6 +347,7 @@ &dsi_nt37801_amoled_cmd { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1"; qcom,mdss-dsi-display-timings { timing@0 { @@ -386,6 +387,7 @@ &dsi_nt37801_amoled_video { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1"; qcom,mdss-dsi-display-timings { timing@0 { From f87233beaca71f0f68a621ba76e08e2425914433 Mon Sep 17 00:00:00 2001 From: Rui Chen Date: Tue, 12 Dec 2023 14:45:01 +0800 Subject: [PATCH 12/22] ARM: dts: msm: enable touch panel on sun QRD platform Adds touch panel dts nodes for QRD platform. Change-Id: Ia60a126574e6841bdd2c4de1dacf63d42fe93ded Signed-off-by: Rui Chen --- display/sun-sde-display-qrd.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/display/sun-sde-display-qrd.dtsi b/display/sun-sde-display-qrd.dtsi index 3d730f68..65f8e0d2 100644 --- a/display/sun-sde-display-qrd.dtsi +++ b/display/sun-sde-display-qrd.dtsi @@ -48,3 +48,12 @@ &sde_dsi { qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd_cphy>; }; + +&qupv3_se4_spi { + st_fts@0 { + panel = <&dsi_nt37801_amoled_cmd_cphy + &dsi_nt37801_amoled_video_cphy + &dsi_nt37801_amoled_cmd + &dsi_nt37801_amoled_video>; + }; +}; From 423d3e762a39536ee61c521d9127561c3215fe1a Mon Sep 17 00:00:00 2001 From: Veera Sundaram Sankaran Date: Sun, 17 Dec 2023 23:27:20 -0800 Subject: [PATCH 13/22] ARM: dts: msm: add APQ SOC id for SDE on sun target Add APQ SOC id in mtp/cdp variants on sun target. Change-Id: I42cf0b07a08f09a983399cd5cffe2001481061e7 Signed-off-by: Veera Sundaram Sankaran --- display/sun-sde-display-cdp-overlay.dts | 2 +- display/sun-sde-display-mtp-overlay.dts | 2 +- display/sun-sde.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/display/sun-sde-display-cdp-overlay.dts b/display/sun-sde-display-cdp-overlay.dts index ab2f2519..a3b29d3c 100644 --- a/display/sun-sde-display-cdp-overlay.dts +++ b/display/sun-sde-display-cdp-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <1 0>; }; diff --git a/display/sun-sde-display-mtp-overlay.dts b/display/sun-sde-display-mtp-overlay.dts index 9038f744..48ad6325 100644 --- a/display/sun-sde-display-mtp-overlay.dts +++ b/display/sun-sde-display-mtp-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <8 0>; }; diff --git a/display/sun-sde.dts b/display/sun-sde.dts index d55ab390..4b3a3f74 100644 --- a/display/sun-sde.dts +++ b/display/sun-sde.dts @@ -9,6 +9,6 @@ #include "sun-sde.dtsi" / { - qcom,msm-id = <618 0x10000>; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <15 0>; }; From 2f8d5c682facdb02c19fccbebd6b480c6b384b6b Mon Sep 17 00:00:00 2001 From: Kirill Shpin Date: Tue, 26 Dec 2023 10:27:03 -0800 Subject: [PATCH 14/22] ARM: dts: msm: add missing license markings Adds missing license markers to files that don't have them. Change-Id: I855935751e4e60976428ad201c5facc2da28db2e Signed-off-by: Kirill Shpin --- display/sun-sde-display-common.dtsi | 1 + display/sun-sde-display-pinctrl.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 765cc2d4..143f1aec 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ diff --git a/display/sun-sde-display-pinctrl.dtsi b/display/sun-sde-display-pinctrl.dtsi index 16f21a89..7a7846df 100644 --- a/display/sun-sde-display-pinctrl.dtsi +++ b/display/sun-sde-display-pinctrl.dtsi @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ From 421daddce2fd95deac8eb45e27fc310643cdb9a7 Mon Sep 17 00:00:00 2001 From: Kirill Shpin Date: Tue, 12 Dec 2023 16:12:12 -0800 Subject: [PATCH 15/22] ARM: dts: msm: add FHD+ mode for CSOT panel Adds a mode with FHD+ resolution to the CSOT panel. Change-Id: I73ba24676e0a74f6f1c95254850d5c2add498336 Signed-off-by: Kirill Shpin --- .../dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi | 85 +++++++++++++++++++ display/sun-sde-display-common.dtsi | 7 ++ 2 files changed, 92 insertions(+) diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi index a9bda899..cc9feff4 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi @@ -51,6 +51,12 @@ qcom,mdss-dsi-v-bottom-border = <0>; qcom,mdss-dsi-panel-jitter = <0x4 0x1>; + qcom,mdss-dsi-timing-switch-command = [ + 39 01 00 00 00 00 05 2A 00 00 05 9F + 39 01 00 00 00 00 05 2B 00 00 0C 7F + 39 01 00 00 00 00 02 8F 00 + ]; + qcom,mdss-dsi-on-command = [ 39 01 00 00 00 00 06 F0 55 AA 52 08 01 39 01 00 00 00 00 02 6F 01 @@ -105,6 +111,85 @@ qcom,mdss-dsc-bit-per-pixel = <8>; qcom,mdss-dsc-block-prediction-enable; }; + + timing@1 { + cell-index = <1>; + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2400>; + qcom,mdss-dsi-h-front-porch = <20>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <18>; + qcom,mdss-dsi-v-front-porch = <20>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-jitter = <0x4 0x1>; + + qcom,mdss-dsi-timing-switch-command = [ + 39 01 00 00 00 00 05 2A 00 00 04 37 + 39 01 00 00 00 00 05 2B 00 00 09 5F + 39 01 00 00 00 00 02 8F 01 + ]; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 02 6F 01 + 39 01 00 00 00 00 04 C5 0B 0B 0B + 39 01 00 00 00 00 05 FF AA 55 A5 80 + 39 01 00 00 00 00 02 6F 02 + 39 01 00 00 00 00 02 F5 10 + 39 01 00 00 00 00 02 6F 1B + 39 01 00 00 00 00 02 F4 55 + 39 01 00 00 00 00 02 6F 18 + 39 01 00 00 00 00 02 F8 19 + 39 01 00 00 00 00 02 6F 0F + 39 01 00 00 00 00 02 FC 00 + 39 01 00 00 00 00 05 2A 00 00 04 37 + 39 01 00 00 00 00 05 2B 00 00 09 5F + 39 01 00 00 00 00 03 90 03 03 + 39 01 00 00 00 00 13 91 89 28 00 28 D2 00 02 86 04 3A 00 0A 02 AB 01 E9 10 F0 + 39 01 00 00 00 00 13 93 89 28 00 28 D2 00 02 25 03 B6 00 07 02 AB 02 8B 10 F0 + 39 01 00 00 00 00 13 95 89 28 00 28 D2 00 01 C3 02 FC 00 05 02 AB 03 D1 10 F0 + 39 01 00 00 00 00 02 03 00 + 39 01 00 00 00 00 02 8F 01 + 39 01 00 00 00 00 02 6F 06 + 39 01 00 00 00 00 02 F3 DC + 39 01 00 00 00 00 02 26 00 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 05 3B 00 18 00 10 + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 07 51 07 FF 07 FF 0F FF + 39 01 00 00 00 00 02 5A 01 + 39 01 00 00 00 00 02 5F 00 + 39 01 00 00 00 00 02 9C 01 + 05 01 00 00 00 00 01 2C + 39 01 00 00 00 00 02 2F 00 + + 05 01 00 00 78 00 01 11 + 05 01 00 00 14 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-timing-switch-command-state = + "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <40>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; }; }; }; diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 0f22bc80..a78c7146 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -355,6 +355,13 @@ qcom,display-topology = <2 2 1>; qcom,default-topology-index = <0>; }; + + timing@1 { + qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a + 0b 0a 02 04 00 21 0f]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; }; }; From 9f36f8826743fd826beeb1078261ec6e13afb793 Mon Sep 17 00:00:00 2001 From: Renchao Liu Date: Wed, 15 Nov 2023 14:09:46 +0800 Subject: [PATCH 16/22] ARM: dts: msm: update DSPP GC/PCC version DSPP functionality has been updated to support high precision mode. Update the DSPP block versions accordingly. Change-Id: Iad137c4fc54127c05cc92b8ed4948e2b78e43437 Signed-off-by: Renchao Liu --- display/sun-sde-common.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index c517fc02..c17ac6b3 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -343,8 +343,8 @@ qcom,sde-dspp-sixzone = <0x900 0x00020000>; qcom,sde-dspp-vlut = <0xa00 0x00010008>; qcom,sde-dspp-gamut = <0x1000 0x00040003>; - qcom,sde-dspp-pcc = <0x1700 0x00040000>; - qcom,sde-dspp-gc = <0x17c0 0x00010008>; + qcom,sde-dspp-pcc = <0x1700 0x00060000>; + qcom,sde-dspp-gc = <0x17c0 0x00020000>; qcom,sde-dspp-dither = <0x82c 0x00010007>; }; }; From c730c8a7cb78b5486cd640c7fbc78b52a98d6d9d Mon Sep 17 00:00:00 2001 From: Jayasri Sampath Kumaran Date: Tue, 19 Dec 2023 17:35:16 -0500 Subject: [PATCH 17/22] ARM: dts: msm: replace smmu address property for sun target Replacing existing smmu address property to upstream compatible property. Change-Id: I0a2eb94d7e91d1d59467bfc68ca4b87a52bd2160 Signed-off-by: Jayasri Sampath Kumaran --- display/sun-sde.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index ae31c68c..6c7e3b31 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -181,10 +181,16 @@ }; }; + smmu_sde_iommu_region_partition: smmu_sde_iommu_region_partition { + iommu-addresses = <&smmu_sde_unsec 0x0 0x00060000>, + <&smmu_sde_unsec 0xd5500000 0x02b00000>, + <&smmu_sde_sec 0x0 0x00020000>; + }; + smmu_sde_unsec: qcom,smmu_sde_unsec_cb { compatible = "qcom,smmu_sde_unsec"; iommus = <&apps_smmu 0x800 0x2>; - qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>; + memory-region = <&smmu_sde_iommu_region_partition>; qcom,iommu-faults = "non-fatal"; qcom,iommu-earlymap; /* for cont-splash */ dma-coherent; @@ -193,7 +199,7 @@ smmu_sde_sec: qcom,smmu_sde_sec_cb { compatible = "qcom,smmu_sde_sec"; iommus = <&apps_smmu 0x801 0x0>; - qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>; + memory-region = <&smmu_sde_iommu_region_partition>; qcom,iommu-faults = "non-fatal"; qcom,iommu-vmid = <0xa>; }; From 8e576b545651159d3cdb88c5c79c117a9cff6cdb Mon Sep 17 00:00:00 2001 From: Qing Huang Date: Mon, 13 Nov 2023 15:20:06 +0800 Subject: [PATCH 18/22] ARM: dts: msm: Update IGC versions for high-precision mode IGC functionality has been updated to support high-precision mode. Update the IGC versions accordingly. Change-Id: I1f57014763c05c26318de703447a6a2c7649a4f7 Signed-off-by: Qing Huang --- display/sun-sde-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index c17ac6b3..1be8c707 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -336,7 +336,7 @@ }; qcom,sde-dspp-blocks { - qcom,sde-dspp-igc = <0x1260 0x00040000>; + qcom,sde-dspp-igc = <0x1260 0x00050000>; qcom,sde-dspp-hsic = <0x800 0x00010007>; qcom,sde-dspp-memcolor = <0x880 0x00010007>; qcom,sde-dspp-hist = <0x800 0x00010007>; From 4fc4835cef7e6b8432350fba983b6111513be96f Mon Sep 17 00:00:00 2001 From: Qing Huang Date: Wed, 15 Nov 2023 14:58:31 +0800 Subject: [PATCH 19/22] ARM: dts: msm: Update LTM version to 1.3 LTM ROI region handling has been updated. Update the LTM DTSI version to 1.3 to track this change. Change-Id: I57a0a07f4f249f837c2f057114f5f15e827e0731 Signed-off-by: Qing Huang --- display/sun-sde.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index ae31c68c..19f90baa 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -231,7 +231,7 @@ qcom,sde-has-idle-pc; qcom,sde-ib-bw-vote = <2500000 0 800000>; - qcom,sde-dspp-ltm-version = <0x00010002>; + qcom,sde-dspp-ltm-version = <0x00010003>; /* offsets are based off dspp 0, 1, 2, and 3 */ qcom,sde-dspp-ltm-off = <0x15300 0x14300 0x13300 0x12300>; From bcee516166f0aca8a42a1f7bc9265654cc6b4828 Mon Sep 17 00:00:00 2001 From: Renchao Liu Date: Wed, 8 Nov 2023 17:01:46 +0800 Subject: [PATCH 20/22] ARM: dts: msm: update ucsc version This change updates ucsc version to support INT2FP/FP2INT enable. Change-Id: I548cef05759cf3ee557d7424b96c5f2ba2ba82d3 Signed-off-by: Renchao Liu --- display/sun-sde-common.dtsi | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index 1be8c707..c03d81ba 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -285,10 +285,10 @@ qcom,sde-fp16-unmult = <0x200 0x00010000>; qcom,sde-fp16-gc = <0x200 0x00010000>; qcom,sde-fp16-csc = <0x200 0x00010000>; - qcom,sde-ucsc-igc = <0x700 0x00010000>; - qcom,sde-ucsc-unmult = <0x700 0x00010000>; - qcom,sde-ucsc-gc = <0x700 0x00010000>; - qcom,sde-ucsc-csc = <0x700 0x00010000>; + qcom,sde-ucsc-igc = <0x700 0x00010001>; + qcom,sde-ucsc-unmult = <0x700 0x00010001>; + qcom,sde-ucsc-gc = <0x700 0x00010001>; + qcom,sde-ucsc-csc = <0x700 0x00010001>; qcom,sde-ucsc-alpha-dither = <0x700 0x00010000>; }; @@ -298,10 +298,10 @@ qcom,sde-fp16-unmult = <0x280 0x00010000>; qcom,sde-fp16-gc = <0x280 0x00010000>; qcom,sde-fp16-csc = <0x280 0x00010000>; - qcom,sde-ucsc-igc = <0x1700 0x00010000>; - qcom,sde-ucsc-unmult = <0x1700 0x00010000>; - qcom,sde-ucsc-gc = <0x1700 0x00010000>; - qcom,sde-ucsc-csc = <0x1700 0x00010000>; + qcom,sde-ucsc-igc = <0x1700 0x00010001>; + qcom,sde-ucsc-unmult = <0x1700 0x00010001>; + qcom,sde-ucsc-gc = <0x1700 0x00010001>; + qcom,sde-ucsc-csc = <0x1700 0x00010001>; qcom,sde-ucsc-alpha-dither = <0x1700 0x00010000>; }; }; @@ -314,10 +314,10 @@ qcom,sde-fp16-unmult = <0x200 0x00010000>; qcom,sde-fp16-gc = <0x200 0x00010000>; qcom,sde-fp16-csc = <0x200 0x00010000>; - qcom,sde-ucsc-igc = <0x700 0x00010000>; - qcom,sde-ucsc-unmult = <0x700 0x00010000>; - qcom,sde-ucsc-gc = <0x700 0x00010000>; - qcom,sde-ucsc-csc = <0x700 0x00010000>; + qcom,sde-ucsc-igc = <0x700 0x00010001>; + qcom,sde-ucsc-unmult = <0x700 0x00010001>; + qcom,sde-ucsc-gc = <0x700 0x00010001>; + qcom,sde-ucsc-csc = <0x700 0x00010001>; qcom,sde-ucsc-alpha-dither = <0x700 0x00010000>; }; @@ -327,10 +327,10 @@ qcom,sde-fp16-unmult = <0x200 0x00010000>; qcom,sde-fp16-gc = <0x200 0x00010000>; qcom,sde-fp16-csc = <0x200 0x00010000>; - qcom,sde-ucsc-igc = <0x1700 0x00010000>; - qcom,sde-ucsc-unmult = <0x1700 0x00010000>; - qcom,sde-ucsc-gc = <0x1700 0x00010000>; - qcom,sde-ucsc-csc = <0x1700 0x00010000>; + qcom,sde-ucsc-igc = <0x1700 0x00010001>; + qcom,sde-ucsc-unmult = <0x1700 0x00010001>; + qcom,sde-ucsc-gc = <0x1700 0x00010001>; + qcom,sde-ucsc-csc = <0x1700 0x00010001>; qcom,sde-ucsc-alpha-dither = <0x1700 0x00010000>; }; }; From ee1cbb9e3cf72a74376fa2a8e94826566c6fd2f1 Mon Sep 17 00:00:00 2001 From: Yuchao Ma Date: Fri, 22 Dec 2023 13:44:14 +0800 Subject: [PATCH 21/22] ARM: dts: msm: Add pack type for SPR on sun target This change adds pack type for SPR on sun target. Change-Id: I2d403a15e2e8a66586dd4acddf1f635c644a9dae Signed-off-by: Yuchao Ma --- display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi | 1 + display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi | 1 + display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi | 1 + display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi | 1 + 4 files changed, 4 insertions(+) diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi index 25357b7c..5612ec26 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi @@ -32,6 +32,7 @@ qcom,mdss-dsi-te-check-enable; qcom,mdss-dsi-te-using-te-pin; qcom,panel-cphy-mode; + qcom,spr-pack-type = "pentile"; qcom,mdss-dsi-display-timings { timing@0 { diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi index e219d5ed..e417cdb2 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi @@ -34,6 +34,7 @@ qcom,mdss-dsi-te-dcs-command = <1>; qcom,mdss-dsi-te-check-enable; qcom,mdss-dsi-te-using-te-pin; + qcom,spr-pack-type = "pentile"; qcom,mdss-dsi-display-timings { timing@0 { cell-index = <0>; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi index 83152a0e..53de247a 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi @@ -22,6 +22,7 @@ qcom,mdss-dsi-tx-eot-append; qcom,adjust-timer-wakeup-ms = <1>; qcom,panel-cphy-mode; + qcom,spr-pack-type = "pentile"; qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>; diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi index 70ba9540..d4647340 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi @@ -27,6 +27,7 @@ qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,spr-pack-type = "pentile"; qcom,mdss-dsi-display-timings { timing@0 { cell-index = <0>; From deeda4cc1fc1014a0fe0fffc9d83e5016d201ccc Mon Sep 17 00:00:00 2001 From: Jayasri Sampath Kumaran Date: Tue, 9 Jan 2024 11:20:14 -0500 Subject: [PATCH 22/22] ARM: dts: msm: update BW limits for sun target Update BW limit values based on QOS recommendation for sun target. Change-Id: Id3ba8542cb89bd4b8d682e7d48841c6a29e2c6d6 Signed-off-by: Jayasri Sampath Kumaran --- display/sun-sde-common.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index c17ac6b3..5d60bfd6 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -177,8 +177,8 @@ qcom,sde-has-dest-scaler; qcom,sde-max-trusted-vm-displays = <1>; - qcom,sde-max-bw-low-kbps = <17000000>; - qcom,sde-max-bw-high-kbps = <27000000>; + qcom,sde-max-bw-low-kbps = <18900000>; + qcom,sde-max-bw-high-kbps = <28500000>; qcom,sde-min-core-ib-kbps = <2500000>; qcom,sde-min-llcc-ib-kbps = <0>; qcom,sde-min-dram-ib-kbps = <800000>;