From c422c02314a73d753f29a0cfc1967b86fabbe745 Mon Sep 17 00:00:00 2001
From: Patrick Daly <quic_pdaly@quicinc.com>
Date: Mon, 2 Oct 2023 18:22:40 -0700
Subject: [PATCH 1/2] ARM: dts: msm: Add arm-smmu device on sun-vm

Describe the register, interrupts, and settings of the arm-smmu device.

Change-Id: I0ca4c90e2f767ed6240dd6ad6fc6cc8e7f6c278d
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
---
 qcom/msm-arm-smmu-sun-vm.dtsi | 56 +++++++++++++++++++++++++++++++++++
 qcom/sun-vm.dtsi              |  2 ++
 2 files changed, 58 insertions(+)
 create mode 100644 qcom/msm-arm-smmu-sun-vm.dtsi

diff --git a/qcom/msm-arm-smmu-sun-vm.dtsi b/qcom/msm-arm-smmu-sun-vm.dtsi
new file mode 100644
index 00000000..f76363e6
--- /dev/null
+++ b/qcom/msm-arm-smmu-sun-vm.dtsi
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	vm-config {
+		vdevices {
+			vsmmu@15000000 {
+				vdevice-type = "vsmmu-v2";
+				smmu-handle = <0x15000000>;
+				num-cbs = <0x6>;
+				num-smrs = <0xe>;
+				patch = "/soc/apps-smmu@15000000";
+			};
+		};
+	};
+};
+
+&soc {
+	apps_smmu: apps-smmu@15000000 {
+		/*
+		 * reg, #global-interrupts & interrupts  properties will
+		 * be added dynamically by bootloader.
+		 */
+		compatible = "qcom,qsmmu-v500", "qcom,virt-smmu";
+		#iommu-cells = <2>;
+		qcom,use-3-lvl-tables;
+		dma-coherent;
+
+		qcom,actlr =
+			/* CAM_HF:Camera */
+			<0x1c08 0x0000 0x00000001>,
+
+			/* Mnoc_HF_23:Display */
+			<0x0804 0x0002 0x00000001>,
+
+			/* NSP:Compute */
+			<0x0c0b 0x0000 0x00000303>,
+
+			/* SF:Camera */
+			<0x1808 0x0020 0x00000001>,
+			<0x1841 0x0000 0x00000103>,
+			<0x1861 0x0000 0x00000001>,
+			<0x1881 0x0000 0x00000103>,
+			<0x18c2 0x0000 0x00000103>,
+			<0x18e8 0x0000 0x00000001>,
+			<0x1982 0x0000 0x00000103>,
+
+			/* SF:EVA */
+			<0x1901 0x0020 0x00000103>,
+			<0x1925 0x0000 0x00000103>;
+	};
+};
diff --git a/qcom/sun-vm.dtsi b/qcom/sun-vm.dtsi
index 06847e00..9bef31c0 100644
--- a/qcom/sun-vm.dtsi
+++ b/qcom/sun-vm.dtsi
@@ -223,3 +223,5 @@
 		clock-frequency = <19200000>;
 	};
 };
+
+#include "msm-arm-smmu-sun-vm.dtsi"

From 5e0b3e7476347f783efe3129296d52e5ed8be949 Mon Sep 17 00:00:00 2001
From: Patrick Daly <quic_pdaly@quicinc.com>
Date: Mon, 2 Oct 2023 18:28:53 -0700
Subject: [PATCH 2/2] ARM: dts: msm: Add dma-buf heaps for sun-vm

Describe the available dma-buf memory pools on sun-vm.

Change-Id: I205b826849f36078d05a92492238d80a884aa65a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
---
 qcom/sun-vm-dma-heaps.dtsi | 35 +++++++++++++++++++++++++++++++++++
 qcom/sun-vm.dtsi           |  1 +
 2 files changed, 36 insertions(+)
 create mode 100644 qcom/sun-vm-dma-heaps.dtsi

diff --git a/qcom/sun-vm-dma-heaps.dtsi b/qcom/sun-vm-dma-heaps.dtsi
new file mode 100644
index 00000000..24e9b7e8
--- /dev/null
+++ b/qcom/sun-vm-dma-heaps.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
+
+&soc {
+	qcom,dma-heaps {
+		compatible = "qcom,dma-heaps";
+
+		qcom,tui {
+			qcom,dma-heap-name = "qcom,tui";
+			qcom,dma-heap-type = <HEAP_TYPE_TUI_CARVEOUT>;
+			qcom,dynamic-heap;
+		};
+
+		qcom,ms1 {
+			qcom,dma-heap-name = "qcom,ms1";
+			qcom,dma-heap-type = <HEAP_TYPE_TUI_CARVEOUT>;
+			qcom,dynamic-heap;
+		};
+
+		qcom,ms2 {
+			qcom,dma-heap-name = "qcom,ms2";
+			qcom,dma-heap-type = <HEAP_TYPE_TUI_CARVEOUT>;
+			qcom,dynamic-heap;
+		};
+
+		qcom,ms3 {
+			qcom,dma-heap-name = "qcom,ms3";
+			qcom,dma-heap-type = <HEAP_TYPE_TUI_CARVEOUT>;
+			qcom,dynamic-heap;
+		};
+	};
+};
diff --git a/qcom/sun-vm.dtsi b/qcom/sun-vm.dtsi
index 9bef31c0..b548a924 100644
--- a/qcom/sun-vm.dtsi
+++ b/qcom/sun-vm.dtsi
@@ -225,3 +225,4 @@
 };
 
 #include "msm-arm-smmu-sun-vm.dtsi"
+#include "sun-vm-dma-heaps.dtsi"