From b3e13f607ebddc64437831d16e9d3544bd2e9da3 Mon Sep 17 00:00:00 2001 From: Gerrit SelfHelp Service Account Date: Wed, 7 Feb 2024 21:16:39 -0800 Subject: [PATCH 01/22] Initial empty repository From 6fca99fedd6d7246cc81ecfe612f03fb0a72fa05 Mon Sep 17 00:00:00 2001 From: Megha Byahatti Date: Fri, 9 Feb 2024 12:55:00 +0530 Subject: [PATCH 02/22] video: devicetree: Align with upstream osdt According to upstream requirement moving devicetree form vendor/qcom/proprietary/video-devicetree to vendor/qcom/opensource/video-devicetree by creating new project. All the changes to the devicetree need to be done in this project to be merged. All changes will need Signed-off-by: tags and will need to use open source emails. Change-Id: I2865fb1fa9e1dae6bf2bf4f2a01bd000d928dba9 Signed-off-by: Megha Byahatti --- Kbuild | 22 +++++++ Makefile | 9 +++ kalama-vidc-v2.dts | 20 ++++++ kalama-vidc-v2.dtsi | 12 ++++ kalama-vidc.dts | 20 ++++++ kalama-vidc.dtsi | 94 +++++++++++++++++++++++++++++ pineapple-vidc-v2.dts | 20 ++++++ pineapple-vidc-v2.dtsi | 12 ++++ pineapple-vidc.dts | 20 ++++++ pineapple-vidc.dtsi | 112 ++++++++++++++++++++++++++++++++++ sun-vidc.dts | 20 ++++++ sun-vidc.dtsi | 134 +++++++++++++++++++++++++++++++++++++++++ waipio-vidc.dts | 21 +++++++ waipio-vidc.dtsi | 103 +++++++++++++++++++++++++++++++ 14 files changed, 619 insertions(+) create mode 100644 Kbuild create mode 100644 Makefile create mode 100644 kalama-vidc-v2.dts create mode 100644 kalama-vidc-v2.dtsi create mode 100644 kalama-vidc.dts create mode 100644 kalama-vidc.dtsi create mode 100644 pineapple-vidc-v2.dts create mode 100644 pineapple-vidc-v2.dtsi create mode 100644 pineapple-vidc.dts create mode 100644 pineapple-vidc.dtsi create mode 100644 sun-vidc.dts create mode 100644 sun-vidc.dtsi create mode 100644 waipio-vidc.dts create mode 100644 waipio-vidc.dtsi diff --git a/Kbuild b/Kbuild new file mode 100644 index 00000000..45c6be94 --- /dev/null +++ b/Kbuild @@ -0,0 +1,22 @@ + +ifeq ($(CONFIG_ARCH_WAIPIO), y) +dtbo-y += waipio-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_KALAMA), y) +dtbo-y += kalama-vidc.dtbo +dtbo-y += kalama-vidc-v2.dtbo +endif + +ifeq ($(CONFIG_ARCH_PINEAPPLE), y) +dtbo-y += pineapple-vidc.dtbo +dtbo-y += pineapple-vidc-v2.dtbo +endif + +ifeq ($(CONFIG_ARCH_SUN), y) +dtbo-y += sun-vidc.dtbo +endif + +always-y := $(dtb-y) $(dtbo-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb *.dtbo diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..b1e0dfe9 --- /dev/null +++ b/Makefile @@ -0,0 +1,9 @@ +KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=. + +all: dtbs + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean + +%: + $(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS) diff --git a/kalama-vidc-v2.dts b/kalama-vidc-v2.dts new file mode 100644 index 00000000..57c66469 --- /dev/null +++ b/kalama-vidc-v2.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "kalama-vidc-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kalama"; + compatible = "qcom,kalama"; + qcom,msm-id = <519 0x20000>, <536 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/kalama-vidc-v2.dtsi b/kalama-vidc-v2.dtsi new file mode 100644 index 00000000..671e709b --- /dev/null +++ b/kalama-vidc-v2.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kalama-vidc.dtsi" + +/* KalamaV2-specific changes */ +&msm_vidc { + compatible = "qcom,sm8550-vidc-v2"; +}; + diff --git a/kalama-vidc.dts b/kalama-vidc.dts new file mode 100644 index 00000000..2bf746c3 --- /dev/null +++ b/kalama-vidc.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "kalama-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kalama"; + compatible = "qcom,kalama"; + qcom,msm-id = <519 0x10000>, <536 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/kalama-vidc.dtsi b/kalama-vidc.dtsi new file mode 100644 index 00000000..b7c91d75 --- /dev/null +++ b/kalama-vidc.dtsi @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,sm8550-vidc"; + status = "okay"; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + clock-names = + "gcc_video_axi0", + "core_clk", + "vcodec_clk", + "video_cc_mvs0_clk_src"; + + /* Bus Interconnects */ + interconnects = + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>; + interconnect-names = + "venus-cnoc", + "venus-ddr", + "venus-llcc"; + + /* FW load region */ + memory-region = <&video_mem>; + + /* Clock Resets */ + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "video_axi_reset"; + + /* MMUs */ + non_secure_pixel_cb { + compatible = "qcom,vidc,cb-ns-pxl"; + iommus = <&apps_smmu 0x1947 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + dma-coherent; + }; + + non_secure_cb { + compatible = "qcom,vidc,cb-ns"; + iommus = <&apps_smmu 0x1940 0x0000>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,vidc,cb-sec-non-pxl"; + iommus = <&apps_smmu 0x1944 0x0000>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,vidc,cb-sec-bitstream"; + iommus = <&apps_smmu 0x1941 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,vidc,cb-sec-pxl"; + iommus = <&apps_smmu 0x1943 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,secure-context-bank; + }; + }; +}; diff --git a/pineapple-vidc-v2.dts b/pineapple-vidc-v2.dts new file mode 100644 index 00000000..ca37f254 --- /dev/null +++ b/pineapple-vidc-v2.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "pineapple-vidc-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. pineapple"; + compatible = "qcom,pineapple"; + qcom,msm-id = <557 0x20000>, <577 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/pineapple-vidc-v2.dtsi b/pineapple-vidc-v2.dtsi new file mode 100644 index 00000000..529d8243 --- /dev/null +++ b/pineapple-vidc-v2.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "pineapple-vidc.dtsi" + +/* Pineapple V2-specific changes */ +&msm_vidc { + compatible = "qcom,sm8650-vidc-v2"; +}; + diff --git a/pineapple-vidc.dts b/pineapple-vidc.dts new file mode 100644 index 00000000..d863acdc --- /dev/null +++ b/pineapple-vidc.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "pineapple-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple"; + compatible = "qcom,pineapple"; + qcom,msm-id = <557 0x10000>, <577 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/pineapple-vidc.dtsi b/pineapple-vidc.dtsi new file mode 100644 index 00000000..36e49831 --- /dev/null +++ b/pineapple-vidc.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,sm8650-vidc"; + status = "okay"; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clocks = + <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + clock-names = + "gcc_video_axi0_clk", + "video_cc_mvs0c_clk", + "video_cc_mvs0_clk", + "video_cc_mvs0_clk_src"; + + /* Bus Interconnects */ + interconnects = + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO &gem_noc SLAVE_LLCC>; + interconnect-names = + "venus-cnoc", + "venus-ddr", + "venus-llcc"; + + /* FW load region */ + memory-region = <&video_mem>; + + /* Clock Resets */ + resets = + <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_XO_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = + "video_axi_reset", + "video_xo_reset", + "video_mvs0c_reset"; + + /* MMUs */ + non_secure_pixel_cb { + compatible = "qcom,vidc,cb-ns-pxl"; + iommus = <&apps_smmu 0x1947 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + /* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */ + qcom,iova-max-align-shift = <8>; + dma-coherent; + }; + + non_secure_cb { + compatible = "qcom,vidc,cb-ns"; + iommus = <&apps_smmu 0x1940 0x0000>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,vidc,cb-sec-non-pxl"; + iommus = <&apps_smmu 0x1944 0x0000>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,vidc,cb-sec-bitstream"; + iommus = <&apps_smmu 0x1941 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,vidc,cb-sec-pxl"; + iommus = <&apps_smmu 0x1943 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + }; +}; diff --git a/sun-vidc.dts b/sun-vidc.dts new file mode 100644 index 00000000..491f7280 --- /dev/null +++ b/sun-vidc.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "sun-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun"; + compatible = "qcom,sun"; + qcom,msm-id = <618 0x10000>, <639 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/sun-vidc.dtsi b/sun-vidc.dtsi new file mode 100644 index 00000000..8327d7b2 --- /dev/null +++ b/sun-vidc.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,sm8750-vidc"; + status = "okay"; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clocks = + <&gcc GCC_VIDEO_AXI1_CLK>, + <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>, + <&videocc VIDEO_CC_MVS0_FREERUN_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + clock-names = + "gcc_video_axi1_clk", + "gcc_video_axi0_clk", + "video_cc_mvs0c_freerun_clk", + "video_cc_mvs0_freerun_clk", + "video_cc_mvs0c_clk", + "video_cc_mvs0_clk", + "video_cc_mvs0_clk_src"; + + /* Bus Interconnects */ + interconnects = + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_MVP &gem_noc SLAVE_LLCC>; + interconnect-names = + "venus-cnoc", + "venus-ddr", + "venus-llcc"; + + /* FW load region */ + memory-region = <&video_mem>; + + /* Clock Resets */ + resets = + <&gcc GCC_VIDEO_AXI1_CLK_ARES>, + <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>, + <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>; + reset-names = + "video_axi1_reset", + "video_axi0_reset", + "video_mvs0c_freerun_reset", + "video_mvs0_freerun_reset"; + + /* MMUs */ + iommu_region_partition: iommu_region_partition { + /* These IOVA regions are unique per context bank */ + iommu-addresses = <&non_secure_pixel_cb 0x0 0x00100000>, + <&non_secure_pixel_cb 0xe0000000 0x20000000>, + <&non_secure_cb 0x0 0x25800000>, + <&non_secure_cb 0xe0000000 0x20000000>, + <&secure_non_pixel_cb 0x0 0x01000000>, + <&secure_non_pixel_cb 0x25800000 0xda800000>, + <&secure_bitstream_cb 0x0 0x00500000>, + <&secure_bitstream_cb 0xe0000000 0x20000000>, + <&secure_pixel_cb 0x0 0x00500000>, + <&secure_pixel_cb 0xe0000000 0x20000000>; + }; + + non_secure_pixel_cb: non_secure_pixel_cb { + compatible = "qcom,vidc,cb-ns-pxl"; + iommus = <&apps_smmu 0x1947 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + /* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */ + qcom,iova-max-align-shift = <8>; + dma-coherent; + }; + + non_secure_cb: non_secure_cb { + compatible = "qcom,vidc,cb-ns"; + iommus = <&apps_smmu 0x1940 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + dma-coherent; + }; + + secure_non_pixel_cb: secure_non_pixel_cb { + compatible = "qcom,vidc,cb-sec-non-pxl"; + iommus = <&apps_smmu 0x1944 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_bitstream_cb: secure_bitstream_cb { + compatible = "qcom,vidc,cb-sec-bitstream"; + iommus = <&apps_smmu 0x1941 0x0004>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_pixel_cb: secure_pixel_cb { + compatible = "qcom,vidc,cb-sec-pxl"; + iommus = <&apps_smmu 0x1943 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + }; +}; diff --git a/waipio-vidc.dts b/waipio-vidc.dts new file mode 100644 index 00000000..63d2b372 --- /dev/null +++ b/waipio-vidc.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. waipio v1 SoC"; + compatible = "qcom,waipio"; + qcom,msm-id = <457 0x10000>, <482 0x10000>, + <457 0x20000>, <482 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi new file mode 100644 index 00000000..6b8696c8 --- /dev/null +++ b/waipio-vidc.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,sm8450-vidc"; + status = "okay"; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>, + <&clock_videocc VIDEO_CC_MVS0C_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK_SRC>; + clock-names = + "gcc_video_axi0", + "core_clk", + "vcodec_clk", + "video_cc_mvs0_clk_src"; + + /* Bus Interconnects */ + interconnects = + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_P0 &gem_noc SLAVE_LLCC>; + interconnect-names = + "venus-cnoc", + "venus-ddr", + "venus-llcc"; + + /* FW load region */ + memory-region = <&video_mem>; + + /* Clock Resets */ + resets = + <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = + "video_axi_reset", + "video_core_reset"; + + /* MMUs */ + non_secure_pixel_cb { + compatible = "qcom,vidc,cb-ns-pxl"; + iommus = <&apps_smmu 0x2187 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + dma-coherent; + }; + + non_secure_cb { + compatible = "qcom,vidc,cb-ns"; + iommus = <&apps_smmu 0x2180 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,vidc,cb-sec-non-pxl"; + iommus = <&apps_smmu 0x2184 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,vidc,cb-sec-bitstream"; + iommus = <&apps_smmu 0x2181 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,vidc,cb-sec-pxl"; + iommus = <&apps_smmu 0x2183 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,secure-context-bank; + }; + }; +}; From f02c676d1b101d7f4156e72737f799b0bea9d206 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Sat, 24 Feb 2024 20:54:38 +0530 Subject: [PATCH 03/22] ARM: dts: msm: Use genPD instead of regulators for GDSC From Sun target, clock driver moved the GDSC from regulator framework to GenPd to match with upstream. Add support to use GenPD using pm_runtime apis. Change-Id: I5c773e25e5a72aebbb106d22e1543947be8cf644 Signed-off-by: Vedang Nagar --- sun-vidc.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/sun-vidc.dtsi b/sun-vidc.dtsi index 8327d7b2..51365718 100644 --- a/sun-vidc.dtsi +++ b/sun-vidc.dtsi @@ -15,9 +15,10 @@ reg = <0x0aa00000 0xF0000>; interrupts = ; - /* Supply */ - iris-ctl-supply = <&video_cc_mvs0c_gdsc>; - vcodec-supply = <&video_cc_mvs0_gdsc>; + /* Power Domains */ + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>; + power-domain-names = "iris-ctl", "vcodec"; /* Clocks */ clocks = From 376d3dc360b7cb6d406173e7005805fa8bdcf18a Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 28 Mar 2024 10:51:03 +0530 Subject: [PATCH 04/22] ARM: dts: msm: Add support for sun V2 devices Adding support for sun v2 devices Change-Id: Ia9efdcad595df7a9f3ff0320deed6099c91095eb Signed-off-by: Vedang Nagar --- sun-vidc-v2.dts | 20 ++++++++++++++++++++ sun-vidc-v2.dtsi | 12 ++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 sun-vidc-v2.dts create mode 100755 sun-vidc-v2.dtsi diff --git a/sun-vidc-v2.dts b/sun-vidc-v2.dts new file mode 100644 index 00000000..9c258d55 --- /dev/null +++ b/sun-vidc-v2.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "sun-vidc-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun"; + compatible = "qcom,sun"; + qcom,msm-id = <618 0x20000>, <639 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/sun-vidc-v2.dtsi b/sun-vidc-v2.dtsi new file mode 100755 index 00000000..c2f4b370 --- /dev/null +++ b/sun-vidc-v2.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "sun-vidc.dtsi" + +/* sun V2-specific changes */ +&msm_vidc { + compatible = "qcom,sm8750-vidc-v2"; +}; + From 2a3f1a1d7eac9c1f01a90e13b171f7480da37be3 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 4 Apr 2024 16:20:46 -0700 Subject: [PATCH 05/22] ARM: dts: msm: new MSM-ID to support for different packagings add new MSM-ID for SUN target Change-Id: I499ca819601af72cde89a552c8adf2b6f421f34c Signed-off-by: Vedang Nagar --- sun-vidc-v2.dts | 4 +++- sun-vidc.dts | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/sun-vidc-v2.dts b/sun-vidc-v2.dts index 9c258d55..d8e521a1 100644 --- a/sun-vidc-v2.dts +++ b/sun-vidc-v2.dts @@ -15,6 +15,8 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x20000>, <639 0x20000>; + qcom,msm-id = <618 0x20000>, <639 0x20000>, + <0x100026a 0x20000>, + <0x100027f 0x20000>; qcom,board-id = <0 0>; }; diff --git a/sun-vidc.dts b/sun-vidc.dts index 491f7280..eaefe01a 100644 --- a/sun-vidc.dts +++ b/sun-vidc.dts @@ -15,6 +15,8 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <639 0x10000>; + qcom,msm-id = <618 0x10000>, <639 0x10000>, + <0x100026a 0x10000>, + <0x100027f 0x10000>; qcom,board-id = <0 0>; }; From d579cb5cdfee41079ed0f2fae4f40c93b49895aa Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Tue, 23 Apr 2024 10:54:51 +0530 Subject: [PATCH 06/22] ARM: dts: msm: Add dtbo for sun V2 device Adding dtbo for sun v2 devices Change-Id: I1d310645de6e50b81d8d7eecf36bc18d89a016a9 Signed-off-by: Vedang Nagar --- Kbuild | 1 + 1 file changed, 1 insertion(+) diff --git a/Kbuild b/Kbuild index 45c6be94..6e94a185 100644 --- a/Kbuild +++ b/Kbuild @@ -15,6 +15,7 @@ endif ifeq ($(CONFIG_ARCH_SUN), y) dtbo-y += sun-vidc.dtbo +dtbo-y += sun-vidc-v2.dtbo endif always-y := $(dtb-y) $(dtbo-y) From 6bb5e83e524997a349a266aae098013d6099ae81 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Thu, 4 Apr 2024 16:20:46 -0700 Subject: [PATCH 07/22] ARM: dts: msm: new MSM-ID to support for different packagings add new MSM-ID for SUN target Change-Id: I499ca819601af72cde89a552c8adf2b6f421f34c Signed-off-by: Vedang Nagar Signed-off-by: Bruce Levy --- sun-vidc-v2.dts | 4 +++- sun-vidc.dts | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/sun-vidc-v2.dts b/sun-vidc-v2.dts index 9c258d55..d8e521a1 100644 --- a/sun-vidc-v2.dts +++ b/sun-vidc-v2.dts @@ -15,6 +15,8 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x20000>, <639 0x20000>; + qcom,msm-id = <618 0x20000>, <639 0x20000>, + <0x100026a 0x20000>, + <0x100027f 0x20000>; qcom,board-id = <0 0>; }; diff --git a/sun-vidc.dts b/sun-vidc.dts index 491f7280..eaefe01a 100644 --- a/sun-vidc.dts +++ b/sun-vidc.dts @@ -15,6 +15,8 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <639 0x10000>; + qcom,msm-id = <618 0x10000>, <639 0x10000>, + <0x100026a 0x10000>, + <0x100027f 0x10000>; qcom,board-id = <0 0>; }; From 55404e9559e9163e134d543f50ce9c5be6ad3788 Mon Sep 17 00:00:00 2001 From: Linux Image Build Automation Date: Tue, 14 May 2024 01:56:19 -0700 Subject: [PATCH 08/22] Revert "ARM: dts: msm: new MSM-ID to support for different packagings" This reverts commit 6bb5e83e524997a349a266aae098013d6099ae81. Change-Id: Id48e9e83aceb5ce939232537a1cad9af4817f24b Signed-off-by: Linux Image Build Automation --- sun-vidc-v2.dts | 4 +--- sun-vidc.dts | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/sun-vidc-v2.dts b/sun-vidc-v2.dts index d8e521a1..9c258d55 100644 --- a/sun-vidc-v2.dts +++ b/sun-vidc-v2.dts @@ -15,8 +15,6 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x20000>, <639 0x20000>, - <0x100026a 0x20000>, - <0x100027f 0x20000>; + qcom,msm-id = <618 0x20000>, <639 0x20000>; qcom,board-id = <0 0>; }; diff --git a/sun-vidc.dts b/sun-vidc.dts index eaefe01a..491f7280 100644 --- a/sun-vidc.dts +++ b/sun-vidc.dts @@ -15,8 +15,6 @@ / { model = "Qualcomm Technologies, Inc. Sun"; compatible = "qcom,sun"; - qcom,msm-id = <618 0x10000>, <639 0x10000>, - <0x100026a 0x10000>, - <0x100027f 0x10000>; + qcom,msm-id = <618 0x10000>, <639 0x10000>; qcom,board-id = <0 0>; }; From ecc94111df08c60b089e1e52ed4f79cb84548892 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 20 Aug 2024 15:46:58 +0530 Subject: [PATCH 09/22] video: devicetree: Add support for tuna target - Add dt support for tuna target Change-Id: I1ab8e3deb26566f8d9b5d62183b95777bae76b1e Signed-off-by: Rajathi S --- tuna-vidc.dts | 19 ++++++++ tuna-vidc.dtsi | 127 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 146 insertions(+) create mode 100644 tuna-vidc.dts create mode 100644 tuna-vidc.dtsi diff --git a/tuna-vidc.dts b/tuna-vidc.dts new file mode 100644 index 00000000..81aaabef --- /dev/null +++ b/tuna-vidc.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "tuna-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. tuna"; + compatible = "qcom,tuna"; + qcom,msm-id = <655 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/tuna-vidc.dtsi b/tuna-vidc.dtsi new file mode 100644 index 00000000..7c9c9050 --- /dev/null +++ b/tuna-vidc.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,tuna-vidc"; + status = "okay"; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clocks = + <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + clock-names = + "gcc_video_axi0_clk", + "video_cc_mvs0c_clk", + "video_cc_mvs0_clk", + "video_cc_mvs0_clk_src"; + + /* Bus Interconnects */ + interconnects = + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_MVP &gem_noc SLAVE_LLCC>; + interconnect-names = + "venus-cnoc", + "venus-ddr", + "venus-llcc"; + + /* FW load region */ + memory-region = <&video_mem>; + + /* Clock Resets */ + resets = + <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_XO_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_CLK_ARES>, + <&videocc VIDEO_CC_MVS0_CLK_ARES>; + reset-names = + "video_axi_reset", + "video_xo_reset", + "video_mvs0c_reset", + "video_mvs0_reset"; + + /* MMUs */ + iommu_region_partition: iommu_region_partition { + /* These IOVA regions are unique per context bank */ + iommu-addresses = <&non_secure_pixel_cb 0x0 0x00100000>, + <&non_secure_pixel_cb 0xe0000000 0x20000000>, + <&non_secure_cb 0x0 0x25800000>, + <&non_secure_cb 0xe0000000 0x20000000>, + <&secure_non_pixel_cb 0x0 0x01000000>, + <&secure_non_pixel_cb 0x25800000 0xda800000>, + <&secure_bitstream_cb 0x0 0x00500000>, + <&secure_bitstream_cb 0xe0000000 0x20000000>, + <&secure_pixel_cb 0x0 0x00500000>, + <&secure_pixel_cb 0xe0000000 0x20000000>; + }; + + non_secure_pixel_cb: non_secure_pixel_cb { + compatible = "qcom,vidc,cb-ns-pxl"; + iommus = <&apps_smmu 0x1947 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + /* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */ + qcom,iova-max-align-shift = <8>; + dma-coherent; + }; + + non_secure_cb: non_secure_cb { + compatible = "qcom,vidc,cb-ns"; + iommus = <&apps_smmu 0x1940 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + dma-coherent; + }; + + secure_non_pixel_cb: secure_non_pixel_cb { + compatible = "qcom,vidc,cb-sec-non-pxl"; + iommus = <&apps_smmu 0x1944 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_bitstream_cb: secure_bitstream_cb { + compatible = "qcom,vidc,cb-sec-bitstream"; + iommus = <&apps_smmu 0x1941 0x0004>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_pixel_cb: secure_pixel_cb { + compatible = "qcom,vidc,cb-sec-pxl"; + iommus = <&apps_smmu 0x1943 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + }; +}; From dc388a6fcea69d15876a169879a5b832483fbd51 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 12 Sep 2024 11:37:55 +0530 Subject: [PATCH 10/22] video: devicetree: Add Ramos socid to tuna target - Add dt support for Ramos Change-Id: I6274eb47f53f451e66153e45e628d368f8306e05 Signed-off-by: Rajathi S --- tuna-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-vidc.dts b/tuna-vidc.dts index 81aaabef..ba395185 100644 --- a/tuna-vidc.dts +++ b/tuna-vidc.dts @@ -14,6 +14,6 @@ / { model = "Qualcomm Technologies, Inc. tuna"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>; qcom,board-id = <0 0>; }; From fb56c188a744c07d4ba45a70c61e754504f9b852 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 20 Aug 2024 15:58:58 +0530 Subject: [PATCH 11/22] video: devicetree: Enable dt for tuna target - Enable dt for tuna target Change-Id: I10b150c277e849a83a6505186bbc9f1a468e047a Signed-off-by: Rajathi S --- Kbuild | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Kbuild b/Kbuild index 6e94a185..40cbf4e2 100644 --- a/Kbuild +++ b/Kbuild @@ -15,7 +15,10 @@ endif ifeq ($(CONFIG_ARCH_SUN), y) dtbo-y += sun-vidc.dtbo -dtbo-y += sun-vidc-v2.dtbo +endif + +ifeq ($(CONFIG_ARCH_TUNA), y) +dtbo-y += tuna-vidc.dtbo endif always-y := $(dtb-y) $(dtbo-y) From 4db84e7e4ac621f4263a341dd0ead6d4d02332e0 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 29 Oct 2024 09:29:17 +0530 Subject: [PATCH 12/22] video: devicetree: Add TunaP SoC to tuna target - Add dt support for tunaP soc Change-Id: If4b42e95d11b25db4ed33ece81017835848abb45 --- tuna-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-vidc.dts b/tuna-vidc.dts index ba395185..c96b1be2 100644 --- a/tuna-vidc.dts +++ b/tuna-vidc.dts @@ -14,6 +14,6 @@ / { model = "Qualcomm Technologies, Inc. tuna"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>; qcom,board-id = <0 0>; }; From 884ab8ed9611e4257469e4d4ee959975cd3c6036 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Fri, 25 Oct 2024 15:23:38 +0530 Subject: [PATCH 13/22] ARM: dts: msm: Use genPD instead of regulators for GDSC From Sun target, clock driver moved the GDSC from regulator framework to GenPd to match with upstream. Add support to use GenPD using pm_runtime apis. Change-Id: I19ed8a047f3aea4132be618c81e061b7cce7f9de --- tuna-vidc.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/tuna-vidc.dtsi b/tuna-vidc.dtsi index 7c9c9050..eb8e91b6 100644 --- a/tuna-vidc.dtsi +++ b/tuna-vidc.dtsi @@ -14,9 +14,10 @@ reg = <0x0aa00000 0xF0000>; interrupts = ; - /* Supply */ - iris-ctl-supply = <&video_cc_mvs0c_gdsc>; - vcodec-supply = <&video_cc_mvs0_gdsc>; + /* Power Domains */ + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>; + power-domain-names = "iris-ctl", "vcodec"; /* Clocks */ clocks = From 484d2d91e5b9d0765f28f071e18b1e555288261f Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 17 Oct 2024 11:36:53 +0530 Subject: [PATCH 14/22] video: devicetree: Add support for kera target - Add dt support for kera target Change-Id: I71bc3cc08e89e458c218622b9ea969a5b61b9173 --- kera-vidc.dts | 19 ++++++++ kera-vidc.dtsi | 127 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 146 insertions(+) create mode 100644 kera-vidc.dts create mode 100644 kera-vidc.dtsi diff --git a/kera-vidc.dts b/kera-vidc.dts new file mode 100644 index 00000000..103d5fd8 --- /dev/null +++ b/kera-vidc.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "kera-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kera"; + compatible = "qcom,kera"; + qcom,msm-id = <659 0x10000>, <686 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/kera-vidc.dtsi b/kera-vidc.dtsi new file mode 100644 index 00000000..e609abfb --- /dev/null +++ b/kera-vidc.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,kera-vidc"; + status = "okay"; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clocks = + <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + clock-names = + "gcc_video_axi0_clk", + "video_cc_mvs0c_clk", + "video_cc_mvs0_clk", + "video_cc_mvs0_clk_src"; + + /* Bus Interconnects */ + interconnects = + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_MVP &gem_noc SLAVE_LLCC>; + interconnect-names = + "venus-cnoc", + "venus-ddr", + "venus-llcc"; + + /* FW load region */ + memory-region = <&video_mem>; + + /* Clock Resets */ + resets = + <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_XO_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_CLK_ARES>, + <&videocc VIDEO_CC_MVS0_CLK_ARES>; + reset-names = + "video_axi_reset", + "video_xo_reset", + "video_mvs0c_reset", + "video_mvs0_reset"; + + /* MMUs */ + iommu_region_partition: iommu_region_partition { + /* These IOVA regions are unique per context bank */ + iommu-addresses = <&non_secure_pixel_cb 0x0 0x00100000>, + <&non_secure_pixel_cb 0xe0000000 0x20000000>, + <&non_secure_cb 0x0 0x25800000>, + <&non_secure_cb 0xe0000000 0x20000000>, + <&secure_non_pixel_cb 0x0 0x01000000>, + <&secure_non_pixel_cb 0x25800000 0xda800000>, + <&secure_bitstream_cb 0x0 0x00500000>, + <&secure_bitstream_cb 0xe0000000 0x20000000>, + <&secure_pixel_cb 0x0 0x00500000>, + <&secure_pixel_cb 0xe0000000 0x20000000>; + }; + + non_secure_pixel_cb: non_secure_pixel_cb { + compatible = "qcom,vidc,cb-ns-pxl"; + iommus = <&apps_smmu 0x1947 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + /* log2 of desired alignment (1MB) - log2 of PAGE_SIZE; (8 = 20 - 12) */ + qcom,iova-max-align-shift = <8>; + dma-coherent; + }; + + non_secure_cb: non_secure_cb { + compatible = "qcom,vidc,cb-ns"; + iommus = <&apps_smmu 0x1940 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + dma-coherent; + }; + + secure_non_pixel_cb: secure_non_pixel_cb { + compatible = "qcom,vidc,cb-sec-non-pxl"; + iommus = <&apps_smmu 0x1944 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_bitstream_cb: secure_bitstream_cb { + compatible = "qcom,vidc,cb-sec-bitstream"; + iommus = <&apps_smmu 0x1941 0x0004>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + + secure_pixel_cb: secure_pixel_cb { + compatible = "qcom,vidc,cb-sec-pxl"; + iommus = <&apps_smmu 0x1943 0x0000>; + memory-region = <&iommu_region_partition>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + qcom,iova-best-fit; + qcom,iova-max-align-shift = <8>; /* 1 MB */ + qcom,secure-context-bank; + }; + }; +}; From 99fd6854692bdbc099432537e34ef4f05c11607d Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 29 Oct 2024 09:29:17 +0530 Subject: [PATCH 15/22] video: devicetree: Add TunaP SoC to tuna target - Add dt support for tunaP soc Change-Id: If4b42e95d11b25db4ed33ece81017835848abb45 --- tuna-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-vidc.dts b/tuna-vidc.dts index ba395185..c96b1be2 100644 --- a/tuna-vidc.dts +++ b/tuna-vidc.dts @@ -14,6 +14,6 @@ / { model = "Qualcomm Technologies, Inc. tuna"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>; qcom,board-id = <0 0>; }; From b56f50c83d7c707f856f30a776033466d5e2b4cd Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Fri, 25 Oct 2024 15:23:38 +0530 Subject: [PATCH 16/22] ARM: dts: msm: Use genPD instead of regulators for GDSC From Sun target, clock driver moved the GDSC from regulator framework to GenPd to match with upstream. Add support to use GenPD using pm_runtime apis. Change-Id: I19ed8a047f3aea4132be618c81e061b7cce7f9de --- tuna-vidc.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/tuna-vidc.dtsi b/tuna-vidc.dtsi index 7c9c9050..eb8e91b6 100644 --- a/tuna-vidc.dtsi +++ b/tuna-vidc.dtsi @@ -14,9 +14,10 @@ reg = <0x0aa00000 0xF0000>; interrupts = ; - /* Supply */ - iris-ctl-supply = <&video_cc_mvs0c_gdsc>; - vcodec-supply = <&video_cc_mvs0_gdsc>; + /* Power Domains */ + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>; + power-domain-names = "iris-ctl", "vcodec"; /* Clocks */ clocks = From 96da0b04191d5f599efa1165384a1071fb097a83 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Tue, 20 Aug 2024 15:58:58 +0530 Subject: [PATCH 17/22] video: devicetree: Enable dt for tuna target - Enable dt for tuna target Change-Id: I10b150c277e849a83a6505186bbc9f1a468e047a Signed-off-by: Rajathi S (cherry picked from commit fb56c188a744c07d4ba45a70c61e754504f9b852) --- Kbuild | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Kbuild b/Kbuild index 6e94a185..40cbf4e2 100644 --- a/Kbuild +++ b/Kbuild @@ -15,7 +15,10 @@ endif ifeq ($(CONFIG_ARCH_SUN), y) dtbo-y += sun-vidc.dtbo -dtbo-y += sun-vidc-v2.dtbo +endif + +ifeq ($(CONFIG_ARCH_TUNA), y) +dtbo-y += tuna-vidc.dtbo endif always-y := $(dtb-y) $(dtbo-y) From 4ac5a970135674763b81c25090f3f414db8f7e91 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Sat, 30 Nov 2024 19:05:50 +0530 Subject: [PATCH 18/22] ARM: dts: msm: Added back dtbo for sun V2 device - Adding dtbo for sun v2 devices Change-Id: I408f3fb7b2e3ab307fdaf1748af7205dd101f544 --- Kbuild | 1 + 1 file changed, 1 insertion(+) diff --git a/Kbuild b/Kbuild index 40cbf4e2..cf871915 100644 --- a/Kbuild +++ b/Kbuild @@ -15,6 +15,7 @@ endif ifeq ($(CONFIG_ARCH_SUN), y) dtbo-y += sun-vidc.dtbo +dtbo-y += sun-vidc-v2.dtbo endif ifeq ($(CONFIG_ARCH_TUNA), y) From b95184acc2b7188be947804947c1e3d858c71454 Mon Sep 17 00:00:00 2001 From: Aishanya Srivastava Date: Fri, 22 Nov 2024 19:41:38 +0530 Subject: [PATCH 19/22] ARM: dts: msm: Use genPD instead of regulators for GDSC From Pakala, clock driver moved the GDSC from regulator framework to GenPd to match with upstream. Add support to use GenPD using pm_runtime apis on Kera. Signed-off-by: Aishanya Srivastava Change-Id: Id4be9a5cd189b7c427663c3d1322fbcdb8549d37 --- kera-vidc.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/kera-vidc.dtsi b/kera-vidc.dtsi index e609abfb..288de4d2 100644 --- a/kera-vidc.dtsi +++ b/kera-vidc.dtsi @@ -14,9 +14,10 @@ reg = <0x0aa00000 0xF0000>; interrupts = ; - /* Supply */ - iris-ctl-supply = <&video_cc_mvs0c_gdsc>; - vcodec-supply = <&video_cc_mvs0_gdsc>; + /* Power Domains */ + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>, + <&videocc VIDEO_CC_MVS0_GDSC>; + power-domain-names = "iris-ctl", "vcodec"; /* Clocks */ clocks = From d5e06f7568db57efe960fac84be1a4a0db816592 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Thu, 17 Oct 2024 11:53:23 +0530 Subject: [PATCH 20/22] video: devicetree: Enable dt for kera target - Enable dt for kera target Change-Id: I05f7bb3d08e42e06852bee11566da71da4c1f5b7 --- Kbuild | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Kbuild b/Kbuild index cf871915..e1ab6d69 100644 --- a/Kbuild +++ b/Kbuild @@ -22,6 +22,10 @@ ifeq ($(CONFIG_ARCH_TUNA), y) dtbo-y += tuna-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_KERA), y) +dtbo-y += kera-vidc.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo From b1adaad63ecbbc72e1f836d75f7da43875adf021 Mon Sep 17 00:00:00 2001 From: Rajathi S Date: Sat, 30 Nov 2024 19:05:50 +0530 Subject: [PATCH 21/22] ARM: dts: msm: Added back dtbo for sun V2 device - Adding dtbo for sun v2 devices Change-Id: I408f3fb7b2e3ab307fdaf1748af7205dd101f544 --- Kbuild | 1 + 1 file changed, 1 insertion(+) diff --git a/Kbuild b/Kbuild index af87e3a7..11a0a420 100644 --- a/Kbuild +++ b/Kbuild @@ -15,6 +15,7 @@ endif ifeq ($(CONFIG_ARCH_SUN), y) dtbo-y += sun-vidc.dtbo +dtbo-y += sun-vidc-v2.dtbo endif ifeq ($(CONFIG_ARCH_TUNA), y) From 54fe744ffb89d09de3ef499fd3c7df368302ae5f Mon Sep 17 00:00:00 2001 From: "V S Ganga VaraPrasad (VARA) Adabala" Date: Tue, 17 Dec 2024 23:53:50 +0530 Subject: [PATCH 22/22] Removed duplicate code Change-Id: If02caf890b486bb901ef1019b185fcd394f9bf08 --- Kbuild | 4 ---- 1 file changed, 4 deletions(-) diff --git a/Kbuild b/Kbuild index 11a0a420..e1ab6d69 100644 --- a/Kbuild +++ b/Kbuild @@ -22,10 +22,6 @@ ifeq ($(CONFIG_ARCH_TUNA), y) dtbo-y += tuna-vidc.dtbo endif -ifeq ($(CONFIG_ARCH_TUNA), y) -dtbo-y += tuna-vidc.dtbo -endif - ifeq ($(CONFIG_ARCH_KERA), y) dtbo-y += kera-vidc.dtbo endif