diff --git a/qcom/tuna-usb.dtsi b/qcom/tuna-usb.dtsi index 88fa476e..702269d1 100644 --- a/qcom/tuna-usb.dtsi +++ b/qcom/tuna-usb.dtsi @@ -12,8 +12,8 @@ reg = <0xa600000 0x100000>; reg-names = "core_base"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; ranges; USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>; @@ -28,23 +28,36 @@ resets = <&gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; - interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pwr_event_irq"; + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 14 IRQ_TYPE_EDGE_RISING>, + <&pdc 15 IRQ_TYPE_EDGE_RISING>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pwr_event_irq", "dp_hs_phy_irq", + "dm_hs_phy_irq", "ss_phy_irq"; + + interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb"; + interconnects = <&aggre1_noc MASTER_USB3_0 &mc_virt SLAVE_EBI1>, + <&aggre1_noc MASTER_USB3_0 &config_noc SLAVE_IPA_CFG>, + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>; + + qcom,use-pdc-interrupts; + qcom,use-eusb2-phy; qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <66666667>; qcom,core-clk-rate-disconnected = <133333333>; - dwc3@a600000 { + dwc3_0: dwc3@a600000 { compatible = "snps,dwc3"; - reg = <0xa600000 0xd93c>; + reg = <0x0 0xa600000 0x0 0xd93c>; iommus = <&apps_smmu 0x40 0x0>; qcom,iommu-dma = "atomic"; - qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; + memory-region = <&dwc3_mem_region>; dma-coherent; interrupts = ; + usb-phy = <&eusb2_phy0>, <&usb_nop_phy>; snps,disable-clk-gating; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; @@ -59,4 +72,36 @@ usb-role-switch; }; }; + + dwc3_mem_region: dwc3_mem_region { + iommu-addresses = <&dwc3_0 0x0 0x0 0x0 0x90000000>, + <&dwc3_0 0x0 0xf0000000 0xffffffff 0x10000000>; + }; + + /* USB port related High Speed PHY */ + eusb2_phy0: hsphy@88e3000 { + compatible = "qcom,usb-snps-eusb2-phy"; + reg = <0x88e3000 0x154>, + <0x088e2000 0x4>, + <0x0c278000 0x4>; + reg-names = "eusb2_phy_base", + "eud_enable_reg", + "eud_detect_reg"; + + vdd-supply = <&L3B>; + qcom,vdd-voltage-level = <0 880000 880000>; + vdd_refgen-supply = <&L2B>; + + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>, + <&tcsrcc TCSR_USB2_CLKREF_EN>; + clock-names = "ref_clk_src", "ref_clk"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + reset-names = "phy_reset"; + }; + + usb_nop_phy: usb_nop_phy { + compatible = "usb-nop-xceiv"; + }; + };