ARM: dts: msm: add NT37801 10 bits video mode panel support

This change add NT37801 10 bits video mode panel support.

Change-Id: I7c82b55ed49d6e361278f8285a6ff4373febc3ed
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>

display/dsi-panel-nt37801-dsc-10bit-video.dtsi

@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&mdss_mdp {
+	dsi_nt37801_amoled_dsc_10b_video: qcom,mdss_dsi_nt37801_amoled_dsc_10b_vid {
+		qcom,mdss-dsi-panel-name =
+			"nt37801 amoled video mode dsi csot panel with DSC 10bit";
+		qcom,mdss-dsi-panel-type = "dsi_video_mode";
+		qcom,mdss-dsi-panel-physical-type = "oled";
+		qcom,mdss-dsi-virtual-channel-id = <0>;
+		qcom,mdss-dsi-stream = <0>;
+		qcom,mdss-dsi-bpp = <30>;
+		qcom,mdss-dsi-border-color = <0>;
+		qcom,dsi-ctrl-num = <0>;
+		qcom,dsi-phy-num = <0>;
+		qcom,mdss-dsi-traffic-mode = "burst_mode";
+		qcom,mdss-dsi-bllp-eof-power-mode;
+		qcom,mdss-dsi-bllp-power-mode;
+		qcom,mdss-dsi-lane-0-state;
+		qcom,mdss-dsi-lane-1-state;
+		qcom,mdss-dsi-lane-2-state;
+		qcom,mdss-dsi-lane-3-state;
+		qcom,mdss-dsi-dma-trigger = "trigger_sw";
+		qcom,mdss-dsi-mdp-trigger = "none";
+		qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
+		qcom,mdss-dsi-tx-eot-append;
+		qcom,adjust-timer-wakeup-ms = <1>;
+
+		qcom,mdss-dsi-wr-mem-start = <0x2c>;
+		qcom,mdss-dsi-wr-mem-continue = <0x3c>;
+		qcom,spr-pack-type = "pentile";
+		qcom,mdss-dsi-display-timings {
+			timing@0 {
+				cell-index = <0>;
+				qcom,mdss-dsi-panel-framerate = <120>;
+				qcom,mdss-dsi-panel-width = <1440>;
+				qcom,mdss-dsi-panel-height = <3200>;
+				qcom,mdss-dsi-h-front-porch = <100>;
+				qcom,mdss-dsi-h-back-porch = <20>;
+				qcom,mdss-dsi-h-pulse-width = <20>;
+				qcom,mdss-dsi-h-sync-skew = <0>;
+				qcom,mdss-dsi-v-back-porch = <20>;
+				qcom,mdss-dsi-v-front-porch = <44>;
+				qcom,mdss-dsi-v-pulse-width = <2>;
+				qcom,mdss-dsi-h-left-border = <0>;
+				qcom,mdss-dsi-h-right-border = <0>;
+				qcom,mdss-dsi-v-top-border = <0>;
+				qcom,mdss-dsi-v-bottom-border = <0>;
+
+				qcom,mdss-dsi-on-command = [
+					39 01 00 00 00 00 06 f0 55 aa 52 08 00
+					39 01 00 00 00 00 02 c2 81
+					39 01 00 00 00 00 06 f0 55 aa 52 08 03
+					39 01 00 00 00 00 02 c6 a2
+					39 01 00 00 00 00 06 f0 55 aa 52 08 05
+					39 01 00 00 00 00 02 6f 08
+					39 01 00 00 00 00 06 ec 10 00 00 00 ff
+					39 01 00 00 00 00 02 17 01
+					39 01 00 00 00 00 05 3b 00 14 00 2c
+					39 01 00 00 00 00 06 f0 55 aa 52 08 01
+					39 01 00 00 00 00 02 c3 19
+					39 01 00 00 00 00 02 6f 01
+					39 01 00 00 00 00 04 c5 0b 0b 0b
+					39 01 00 00 00 00 05 ff aa 55 a5 81
+					39 01 00 00 00 00 02 6f 02
+					39 01 00 00 00 00 02 f5 10
+					39 01 00 00 00 00 02 6f 1b
+					39 01 00 00 00 00 02 f4 55
+					39 01 00 00 00 00 02 6f 18
+					39 01 00 00 00 00 02 f8 19
+					39 01 00 00 00 00 02 6f 0f
+					39 01 00 00 00 00 02 fc 00
+					39 01 00 00 00 00 05 2a 00 00 05 9f
+					39 01 00 00 00 00 05 2b 00 00 0c 7f
+					39 01 00 00 00 00 02 90 03
+					39 01 00 00 00 00 13 91 ab 2a 00 28 f1
+					   9a 02 68 03 92 00 0e 03 14 02 56 10
+					   ec
+					39 01 00 00 00 00 02 6f 23
+					39 01 00 00 00 00 15 fb 00 01 04 56 77
+					   77 77 99 9b f0 00 02 78 9a bb bc dd
+					   ee ff 00
+					39 01 00 00 00 00 02 f3 dc
+					39 01 00 00 00 00 02 26 00
+					39 01 00 00 00 00 02 35 00
+					39 01 00 00 00 00 02 53 20
+					39 01 00 00 00 00 07 51 07 ff 07 ff 0f
+					   ff
+					39 01 00 00 00 00 02 5A 01
+					39 01 00 00 00 00 02 5f 00
+					39 01 00 00 00 00 02 9c 01
+					05 01 00 00 00 00 01 2c
+					39 01 00 00 00 00 02 2f 00
+					39 01 00 00 00 00 06 f0 55 aa 52 08 01
+					39 01 00 00 00 00 05 b2 55 01 ff 03
+					05 01 00 00 78 00 01 11
+					05 01 00 00 14 00 01 29
+				];
+
+				qcom,mdss-dsi-off-command = [
+					05 01 00 00 14 00 02 28 00
+					05 01 00 00 78 00 02 10 00];
+				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+				qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
+				qcom,mdss-dsi-h-sync-pulse = <0>;
+				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-slice-height = <40>;
+				qcom,mdss-dsc-slice-width = <720>;
+				qcom,mdss-dsc-slice-per-pkt = <1>;
+				qcom,mdss-dsc-bit-per-component = <10>;
+				qcom,mdss-dsc-bit-per-pixel = <10>;
+				qcom,mdss-dsc-block-prediction-enable;
+			};
+		};
+	};
+};

display/sun-sde-display-cdp.dtsi

@@ -67,6 +67,16 @@
 	qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
 };
 
+&dsi_nt37801_amoled_dsc_10b_video {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <10>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <8191>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 98 0>;
+};
+
 &dsi_vtdr6130_amoled_120hz_video {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -175,7 +185,8 @@
 		panel = <&dsi_nt37801_amoled_cmd
 			&dsi_nt37801_amoled_cmd_cphy
 			&dsi_nt37801_amoled_video
-			&dsi_nt37801_amoled_video_cphy>;
+			&dsi_nt37801_amoled_video_cphy
+			&dsi_nt37801_amoled_dsc_10b_video>;
 	};
 };
 

display/sun-sde-display-common.dtsi

@@ -7,6 +7,7 @@
 #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi"
 #include "dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi"
 #include "dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi"
+#include "dsi-panel-nt37801-dsc-10bit-video.dtsi"
 #include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
 #include "dsi-panel-sharp-dsc-4k-video.dtsi"
 #include "dsi-panel-sim-cmd-au.dtsi"
@@ -495,6 +496,29 @@
 	};
 };
 
+&dsi_nt37801_amoled_dsc_10b_video {
+	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
+	qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
+	qcom,mdss-dsi-pan-enable-dynamic-fps;
+	qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
+
+	qcom,esd-check-enabled;
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x9c>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,mdss-dsi-panel-phy-timings = [00 3e 0f 0f 22 1f 0f
+					10 0e 02 04 00 30 14];
+			qcom,display-topology = <2 2 1>;
+			qcom,default-topology-index = <0>;
+		};
+	};
+};
+
 &dsi_sharp_4k_dsc_cmd {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
 

display/sun-sde-display-mtp.dtsi

@@ -61,6 +61,16 @@
 	qcom,platform-reset-gpio = <&tlmm 98 0>;
 };
 
+&dsi_nt37801_amoled_dsc_10b_video {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <10>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <8191>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 98 0>;
+};
+
 &dsi_vtdr6130_amoled_120hz_video {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -168,7 +178,8 @@
 		panel = <&dsi_nt37801_amoled_cmd
 			&dsi_nt37801_amoled_cmd_cphy
 			&dsi_nt37801_amoled_video
-			&dsi_nt37801_amoled_video_cphy>;
+			&dsi_nt37801_amoled_video_cphy
+			&dsi_nt37801_amoled_dsc_10b_video>;
 	};
 };