samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge "ARM: dts: msm: Add cmd-db, RSC and PDC devices for tuna"

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qctecmdr
2024-05-30 01:35:11 -07:00
committed by Gerrit - the friendly Code Review server
parent 6cbdcfce1d 359a23fcde
commit c2954e7aa0
2 changed files with 171 additions and 0 deletions
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8
qcom/tuna-rumi.dtsi
View File

@@ -38,3 +38,11 @@
maximum-speed = "high-speed"; maximum-speed = "high-speed";
}; };
}; };
&cam_rsc {
status = "disabled";
};
&disp_rsc {
status = "disabled";
};

163
qcom/tuna.dtsi
View File

@@ -14,6 +14,7 @@
#include <dt-bindings/clock/qcom,videocc-tuna.h> #include <dt-bindings/clock/qcom,videocc-tuna.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
/ { / {
model = "Qualcomm Technologies, Inc. Tuna"; model = "Qualcomm Technologies, Inc. Tuna";
@@ -292,6 +293,155 @@
}; };
}; };
apps_rsc: rsc@17a00000 {
label = "apps_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0x17a00000 0x10000>,
<0x17a10000 0x10000>,
<0x17a20000 0x10000>;
reg-names = "drv-0", "drv-1", "drv-2";
qcom,drv-count = <3>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
apps_rsc_drv2: drv@2 {
qcom,drv-id = <2>;
qcom,tcs-offset = <0xd00>;
qcom,tcs-distance = <0x2a0>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 3>,
<SLEEP_TCS 2>,
<WAKE_TCS 2>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 1>;
};
};
};
cam_rsc: rsc@adc8000 {
label = "cam_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0xadc8000 0x1000>,
<0xadc9000 0x1000>,
<0xadca000 0x1000>;
reg-names = "drv-0", "drv-1", "drv-2";
qcom,drv-count = <3>;
qcom,hw-channel;
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&camcc CAM_CC_DRV_AHB_CLK>;
cam_rsc_drv0: drv@0 {
qcom,drv-id = <0>;
qcom,tcs-offset = <0x520>;
qcom,tcs-distance = <0x150>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<WAKE_TCS 1>,
<SLEEP_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
channel@1 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<WAKE_TCS 1>,
<SLEEP_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
};
cam_rsc_drv1: drv@1 {
qcom,drv-id = <1>;
qcom,tcs-offset = <0x520>;
qcom,tcs-distance = <0x150>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<WAKE_TCS 1>,
<SLEEP_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
channel@1 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<WAKE_TCS 1>,
<SLEEP_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
};
cam_rsc_drv2: drv@2 {
qcom,drv-id = <2>;
qcom,tcs-offset = <0x520>;
qcom,tcs-distance = <0x150>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<WAKE_TCS 1>,
<SLEEP_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
channel@1 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<WAKE_TCS 1>,
<SLEEP_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
};
};
disp_rsc: rsc@af20000 {
label = "disp_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0xaf20000 0x1000>;
reg-names = "drv-0";
qcom,drv-count = <1>;
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&dispcc DISP_CC_MDSS_RSCC_AHB_CLK>;
disp_rsc_drv0: drv@0 {
qcom,drv-id = <0>;
qcom,tcs-offset = <0x520>;
qcom,tcs-distance = <0x150>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<SLEEP_TCS 1>,
<WAKE_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
};
};
pdc: interrupt-controller@b220000 {
compatible = "qcom,tuna-pdc", "qcom,pdc";
reg = <0xb220000 0x10000>, <0x17c000f0 0x60>;
qcom,pdc-ranges = <0 480 8>, <8 719 1>, <9 718 1>,
<10 230 1>, <11 724 1>, <12 716 1>,
<13 727 1>, <14 720 1>, <15 726 1>,
<16 721 1>, <17 262 1>, <18 70 1>,
<19 723 1>, <20 234 1>, <22 725 1>,
<23 231 1>, <24 504 14>, <40 520 6>,
<51 531 4>, <58 538 2>, <61 541 4>,
<67 547 27>, <94 609 31>, <125 63 1>,
<126 366 2>, <128 374 1>, <129 378 1>,
<130 428 1>, <131 434 2>, <133 437 1>,
<134 452 2>, <136 458 2>, <138 464 11>,
<149 671 1>, <150 688 1>, <151 714 2>,
<153 722 1>, <154 255 1>, <155 269 2>,
<157 276 1>, <158 287 1>, <159 306 4>;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupt-controller;
};
tlmm: pinctrl@f000000 { tlmm: pinctrl@f000000 {
compatible = "qcom,tuna-tlmm"; compatible = "qcom,tuna-tlmm";
reg = <0x0f000000 0x1000000>; reg = <0x0f000000 0x1000000>;
@@ -300,6 +450,7 @@
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
wakeup-parent = <&pdc>;
}; };
ipcc_mproc: qcom,ipcc@406000 { ipcc_mproc: qcom,ipcc@406000 {
@@ -529,6 +680,18 @@
status = "ok"; status = "ok";
}; };
&reserved_memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
aop_cmd_db_mem: aop_cmd_db_region@81c60000 {
compatible = "qcom,cmd-db";
no-map;
reg = <0x0 0x81c60000 0x0 0x20000>;
};
};
#include "tuna-pinctrl.dtsi" #include "tuna-pinctrl.dtsi"
#include "tuna-stub-regulators.dtsi" #include "tuna-stub-regulators.dtsi"
#include "tuna-usb.dtsi" #include "tuna-usb.dtsi"