Merge "ARM: dts: msm: sun: Add remoteproc node"
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@@ -4,30 +4,95 @@
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$id: "http://devicetree.org/schemas/qdsp/msm-fastrpc.yaml#"
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$id: "http://devicetree.org/schemas/qdsp/msm-fastrpc.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: ADSP remote heap region
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title: Qualcomm Technologies, Inc. FastRPC Driver
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description:
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description:
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Defines the ADSP remote heap region. Device used for CMA allocations
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The MSM FastRPC driver implements an IPC (Inter-Processor Communication)
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and mappings for both secure and non-secure usecases.
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mechanism that allows for clients to transparently make remote method
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invocations across DSP and APPS boundaries. This enables developers
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to offload tasks to the DSP and free up the application processor for
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other tasks.qcom,adsprpc-mem node defines the ADSP remote heap region.
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Device is used for CMA allocations and mappings for both secure and
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non-secure usecases.
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maintainers:
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maintainers:
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- Anirudh Raghavendra <quic_araghave@quicinc.com>
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- Anirudh Raghavendra <quic_araghave@quicinc.com>
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properties:
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properties:
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compatible :
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compatible :
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const: qcom,adsprpc-mem
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oneOf:
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- items:
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- "qcom,msm-fastrpc-adsp"
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- "qcom,msm-fastrpc-compute"
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optional:
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- qcom,rpc-latency-us : FastRPC QoS latency vote
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- qcom,adsp-remoteheap-vmid : FastRPC remote heap VMID list
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- qcom,secure-context-bank : Bool indicating secure FastRPC context bank.
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- qcom,fastrpc-legacy-remote-heap : Bool indicating hypervisor is not supported.
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- qcom,fastrpc-adsp-audio-pdr : Flag to enable ADSP Audio PDR
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- qcom,secure-domains : FastRPC secure domain configuration
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- qcom,fastrpc-adsp-sensors-pdr : Flag to enable Sensors PDR
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child-node:
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description:
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Child nodes representing the compute context banks
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properties:
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required:
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required:
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- compatible
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- compatible : Must be "qcom,msm-fastrpc-compute-cb"
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- memory-region
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- label : Label describing the channel this context bank belongs to
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- restrict-access
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- iommus : A list of phandle and IOMMU specifier pairs that describe the
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IOMMU master interfaces of the device
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- dma-coherent : A flag marking a context bank as I/O coherent
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- shared-cb : A value indicating how many fastrpc sessions can share a
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context bank
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additionalProperties: false
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child-node:
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description:
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Child node for rpmsg instead of glink for IPC
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properties:
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required:
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- compatible : Must be "qcom,msm-fastrpc-rpmsg"
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examples:
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child-node:
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- |
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description:
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Child node representing the Remote Heap region
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properties:
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required:
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- compatible : Must be "qcom,msm-adsprpc-mem-region"
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- memory-region : CMA region which is owned by this device
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- restrict-access : Blocking vote for hyp_assign_phys function call
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Example:
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qcom,msm_fastrpc {
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compatible = "qcom,msm-fastrpc-compute";
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qcom,fastrpc-rpmsg;
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qcom,rpc-latency-us = <235>;
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qcom,adsp-remoteheap-vmid = <22 37>;
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qcom,fastrpc-adsp-sensors-pdr;
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qcom,msm_fastrpc_rpmsg {
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compatible = "qcom,msm-fastrpc-rpmsg";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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intents = <0x64 64>;
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};
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qcom,msm_fastrpc_compute_cb_1 {
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compatible = "qcom,msm-fastrpc-compute-cb";
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label = "cdsprpc-smd";
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qcom,secure-context-bank;
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iommus = <&apps_smmu 0x1401 0x0>;
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dma-coherent;
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};
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qcom,msm_fastrpc_compute_cb_2 {
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compatible = "qcom,msm-fastrpc-compute-cb";
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label = "sdsprpc-smd";
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iommus = <&apps_smmu 0x1402 0x0>;
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shared-cb = <5>;
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};
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qcom,adsprpc-mem {
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qcom,adsprpc-mem {
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compatible = "qcom,msm-adsprpc-mem-region";
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compatible = "qcom,msm-adsprpc-mem-region";
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memory-region = <&adsp_mem>;
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memory-region = <&adsp_mem>;
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restrict-access;
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restrict-access;
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};
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};
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};
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148
bindings/soc/qcom/cdsprm.yaml
Normal file
148
bindings/soc/qcom/cdsprm.yaml
Normal file
@@ -0,0 +1,148 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/soc/qcom/cdsprm.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm Technologies, Inc. CDSP Request Manager driver
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description:
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CDSP Request Manager driver implements an rpmsg interface with
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CDSP subsystem to serve L3 frequency and CPU QoS requests from CDSP.
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It also interacts with NPU, Camera modules for Cx iPeak mitigations and
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thermal module via CDSP/HVX cooling devices for thermal mitigation of
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CDSP core. It sends VTCM partitioning information on supported chipsets
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to CDSP.
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maintainers:
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- Gokul krishna Krishnakumar<quic_gokukris@quicinc.com>
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properties:
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required:
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compatible:
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const: qcom,msm-cdsprm-rpmsg
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qcom,glink-channels: Glink channel for communication with CDSP
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qcom,intents: A list of <size of each intent, number of intents>
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child-node:
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description:
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A sub-device node to define CDSPM RM, Cx iPeak mitigation
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driver, CDSP core thermal cooling device and CDSP VTCM partitioning
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properties:
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required:
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compatible:
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const: qcom,msm-cdsprm-rm
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qcom,qos-latency-us: pm_qos latency vote to be applied on CDSP request in
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micro seconds
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qcom,qos-maxhold-ms: Maximum hold time for pm_qos latency vote from CDSP
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in milli seconds
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optional:
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qcom,compute-cx-limit-en: To enable CX ipeak limit management for compute
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subsystem
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qcom,compute-priority-mode: when Cx iPeak mitigation is enabled,
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this field sets desired compute priority mode
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for AIX and HVX concurrency cases based on
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following values, where in HVX and NPU cores,
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if required, are throttled in concurrency based
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on the selected priority mode
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1 : HVX_MAX - Allows HVX to run at maximum possible
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frequency during concurrency with NPU
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2 : AIX_MAX - Allows NPU to run at maximum possible
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frequency during concurrency with HVX
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3 : HVX_OVER_AIX - Allows HVX to run at a higher
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frequency than NPU during concurrency
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4 : AIX_OVER_HVX - Allows NPU to run at a higher
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frequency than HVX during concurrency
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qcom,vtcm-paritions: Number of VTCM partitions (maximum 16)
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qcom,vtcm-partition-info: Specifies the partitions, their sizes and
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flags. Most importantly flags can be used to
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set some partitions as privileged,
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i.e. only available to privileged clients.
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Currently VTCM_FLAG_PRIMARY(0x1), VTCM_FLAG_SECONDARY (0x2)and
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VTCM_FLAG_PRIVILEGED(0x4) are the supported flags per partition
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(only one per partition).
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Size of each partition should be a multiple of 256KB.
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Given 256KB is the minimum VTCM allocation size,
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256K, 1M, 4M are supported page sizes.
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Specifying a 3MB partition will allow maximum of 1MB page (3x).
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Similarly, a 512KB partition will be of 256KB pages (2x).
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PRIMARY and SECONDARY partitions are available to all the clients while
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the PRIMARY partition is used by default. Partition selection is
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controlled by the vtcm-partition-map information.
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There must be only one PRIMARY partition.
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Partitions must be defined with a linear partition index
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starting with 0 till (Number of VTCM partitions - 1).
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VTCM memory will be partitioned in the order provided
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(0 being the first partition).
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qcom,vtcm-partition-map: Maps application type identifiers to
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partitions. Clients use application type IDs to
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request non-default partitions.
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Application identifier is specified as a value [0 – 31]
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in the device tree. The default application identifier
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will be 0. Application identifier must be unique for each
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partition map. Any unassigned application identifier
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in the set of [0 – 31] will be mapped to the PRIMARY partition
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and will return failure if there is no
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qcom,resmgr-pdkill-enable: To enable resource manager PD kill mechanism. When enabled,
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the resource manager (managing VTCM, HMX resources) can kill an
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unsigned process holding any of the resources being
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requested by a privileged process if the release requests sent by
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the resource manager are not acted upon.
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cooling-cells: Number of cooling cells for CDSP cooling device based on
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CDSP Q6 core clock throttling
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child-node:
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description:
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A sub-device node to define HVX based thermal cooling device
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properties:
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required:
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compatible:
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const: qcom,msm-hvx-rm
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cooling-cells: Number of cooling cells for CDSP cooling device based on
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HVX hardware throttling
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child-node:
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description:
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A sub-device node to define CDSP L3 target device for L3 clock voting
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properties:
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required:
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compatible:
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const: qcom,cdsp-l3
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qcom,target-dev: The DT device that corresponds to the CDSP L3
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devfreq-simple-dev
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examples:
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qcom,msm_cdsprm_rpmsg {
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compatible = "qcom,msm-cdsprm-rpmsg";
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qcom,glink-channels = "cdsprmglink-apps-dsp";
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qcom,intents = <0x14 64>;
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qcom,cdsp-l3 {
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compatible = "qcom,cdsp-l3";
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qcom,target-dev = <&cdsp-cdsp-l3-lat>;
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};
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qcom,msm_cdsp_rm {
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compatible = "qcom,msm-cdsp-rm";
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qcom,qos-latency-us = <100>;
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qcom,qos-maxhold-ms = <20>;
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qcom,compute-cx-limit-en;
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qcom,compute-priority-mode = <2>;
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#cooling-cells = <2>;
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qcom,vtcm-paritions = <4>;
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qcom,vtcm-partition-info = < 0 2048 0x1 >,
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< 1 1024 0x2 >,
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< 2 512 0x4 >,
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< 3 512 0x4 >;
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qcom,vtcm-partition-map = < 0 0 >,
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< 1 0 >,
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< 2 1 >,
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< 30 2 >,
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< 31 3 >;
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};
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msm_hvx_rm: qcom,msm_hvx_rm {
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compatible = "qcom,msm-hvx-rm";
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#cooling-cells = <2>;
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};
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};
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243
qcom/sun.dtsi
243
qcom/sun.dtsi
@@ -18,6 +18,7 @@
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#include <dt-bindings/soc/qcom,ipcc.h>
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#include <dt-bindings/soc/qcom,ipcc.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
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#include <dt-bindings/interconnect/qcom,icc.h>
|
#include <dt-bindings/interconnect/qcom,icc.h>
|
||||||
|
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
|
||||||
#include <dt-bindings/power/qcom-aoss-qmp.h>
|
#include <dt-bindings/power/qcom-aoss-qmp.h>
|
||||||
|
|
||||||
/ {
|
/ {
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@@ -1489,6 +1490,248 @@
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restrict-access;
|
restrict-access;
|
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};
|
};
|
||||||
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|
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|
adsp_pas: remoteproc-adsp@03000000 {
|
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|
compatible = "qcom,sun-adsp-pas";
|
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|
reg = <0x03000000 0x10000>;
|
||||||
|
status = "ok";
|
||||||
|
|
||||||
|
cx-supply = <&VDD_LPI_CX_LEVEL>;
|
||||||
|
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
|
||||||
|
mx-supply = <&VDD_LPI_MX_LEVEL>;
|
||||||
|
mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
|
||||||
|
reg-names = "cx", "mx";
|
||||||
|
|
||||||
|
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||||
|
clock-names = "xo";
|
||||||
|
|
||||||
|
qcom,signal-aop;
|
||||||
|
qcom,qmp = <&aoss_qmp>;
|
||||||
|
|
||||||
|
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
|
||||||
|
interconnect-names = "rproc_ddr", "crypto_ddr";
|
||||||
|
|
||||||
|
firmware-name = "adsp.mdt", "adsp_dtb.mdt";
|
||||||
|
|
||||||
|
memory-region = <&adspslpi_mem &q6_adsp_dtb_mem>;
|
||||||
|
|
||||||
|
/* Inputs from ssc */
|
||||||
|
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||||
|
<&adsp_smp2p_in 0 0>,
|
||||||
|
<&adsp_smp2p_in 2 0>,
|
||||||
|
<&adsp_smp2p_in 1 0>,
|
||||||
|
<&adsp_smp2p_in 3 0>;
|
||||||
|
|
||||||
|
interrupt-names = "wdog",
|
||||||
|
"fatal",
|
||||||
|
"handover",
|
||||||
|
"ready",
|
||||||
|
"stop-ack";
|
||||||
|
|
||||||
|
/* Outputs to turing */
|
||||||
|
qcom,smem-states = <&adsp_smp2p_out 0>;
|
||||||
|
qcom,smem-state-names = "stop";
|
||||||
|
|
||||||
|
glink_edge: glink-edge {
|
||||||
|
qcom,remote-pid = <2>;
|
||||||
|
transport = "smem";
|
||||||
|
mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS
|
||||||
|
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||||
|
mbox-names = "adsp_smem";
|
||||||
|
interrupt-parent = <&ipcc_mproc>;
|
||||||
|
interrupts = <IPCC_CLIENT_LPASS
|
||||||
|
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||||
|
IRQ_TYPE_EDGE_RISING>;
|
||||||
|
|
||||||
|
label = "adsp";
|
||||||
|
qcom,glink-label = "lpass";
|
||||||
|
|
||||||
|
qcom,adsp_qrtr {
|
||||||
|
qcom,glink-channels = "IPCRTR";
|
||||||
|
qcom,net-id = <2>;
|
||||||
|
qcom,intents = <0x800 5
|
||||||
|
0x2000 3
|
||||||
|
0x4400 2>;
|
||||||
|
|
||||||
|
qcom,no-wake-svc = <0x190>;
|
||||||
|
};
|
||||||
|
|
||||||
|
qcom,pmic_glink_rpmsg {
|
||||||
|
qcom,glink-channels = "PMIC_RTR_ADSP_APPS";
|
||||||
|
};
|
||||||
|
|
||||||
|
qcom,pmic_glink_log_rpmsg {
|
||||||
|
qcom,glink-channels = "PMIC_LOGS_ADSP_APPS";
|
||||||
|
qcom,intents = <0x800 5
|
||||||
|
0xc00 3
|
||||||
|
0x2000 1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
qcom,msm_fastrpc_rpmsg {
|
||||||
|
compatible = "qcom,msm-fastrpc-rpmsg";
|
||||||
|
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||||
|
qcom,intents = <0x64 64>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
modem_pas: remoteproc-mss@04080000 {
|
||||||
|
compatible = "qcom,sun-modem-pas";
|
||||||
|
reg = <0x4080000 0x10000>;
|
||||||
|
status = "ok";
|
||||||
|
|
||||||
|
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||||
|
clock-names = "xo";
|
||||||
|
|
||||||
|
cx-supply = <&VDD_CX_LEVEL>;
|
||||||
|
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
|
||||||
|
mx-supply = <&VDD_MODEM_LEVEL>;
|
||||||
|
mx-uV-uA = <RPMH_REGULATOR_LEVEL_NOM_L1 100000>;
|
||||||
|
reg-names = "cx", "mx";
|
||||||
|
|
||||||
|
qcom,signal-aop;
|
||||||
|
qcom,qmp = <&aoss_qmp>;
|
||||||
|
|
||||||
|
interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
|
||||||
|
interconnect-names = "rproc_ddr", "crypto_ddr";
|
||||||
|
|
||||||
|
memory-region = <&mpss_mem &q6_mpss_dtb_mem &dsm_partition_1_mem &dsm_partition_2_mem>;
|
||||||
|
firmware-name = "modem.mdt", "modem_dtb.mdt";
|
||||||
|
|
||||||
|
/* Inputs from mss */
|
||||||
|
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
|
||||||
|
<&modem_smp2p_in 0 0>,
|
||||||
|
<&modem_smp2p_in 2 0>,
|
||||||
|
<&modem_smp2p_in 1 0>,
|
||||||
|
<&modem_smp2p_in 3 0>,
|
||||||
|
<&modem_smp2p_in 7 0>;
|
||||||
|
|
||||||
|
interrupt-names = "wdog",
|
||||||
|
"fatal",
|
||||||
|
"handover",
|
||||||
|
"ready",
|
||||||
|
"stop-ack",
|
||||||
|
"shutdown-ack";
|
||||||
|
|
||||||
|
/* Outputs to mss */
|
||||||
|
qcom,smem-states = <&modem_smp2p_out 0>;
|
||||||
|
qcom,smem-state-names = "stop";
|
||||||
|
|
||||||
|
glink-edge {
|
||||||
|
qcom,remote-pid = <1>;
|
||||||
|
transport = "smem";
|
||||||
|
mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS
|
||||||
|
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||||
|
mbox-names = "mpss_smem";
|
||||||
|
interrupt-parent = <&ipcc_mproc>;
|
||||||
|
interrupts = <IPCC_CLIENT_MPSS
|
||||||
|
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||||
|
IRQ_TYPE_EDGE_RISING>;
|
||||||
|
|
||||||
|
label = "modem";
|
||||||
|
qcom,glink-label = "mpss";
|
||||||
|
|
||||||
|
qcom,modem_qrtr {
|
||||||
|
qcom,glink-channels = "IPCRTR";
|
||||||
|
qcom,low-latency;
|
||||||
|
qcom,intents = <0x800 5
|
||||||
|
0x2000 3
|
||||||
|
0x4400 2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
qcom,modem_ds {
|
||||||
|
qcom,glink-channels = "DS";
|
||||||
|
qcom,intents = <0x4000 0x2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
cdsp_pas: remoteproc-cdsp@32300000 {
|
||||||
|
compatible = "qcom,sun-cdsp-pas";
|
||||||
|
reg = <0x32300000 0x10000>;
|
||||||
|
status = "ok";
|
||||||
|
|
||||||
|
cx-supply = <&VDD_CX_LEVEL>;
|
||||||
|
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
|
||||||
|
mx-supply = <&VDD_MXC_LEVEL>;
|
||||||
|
mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
|
||||||
|
nsp-supply = <&VDD_NSP1_LEVEL>;
|
||||||
|
nsp-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
|
||||||
|
reg-names = "cx","mx","nsp";
|
||||||
|
|
||||||
|
firmware-name = "cdsp.mdt", "cdsp_dtb.mdt";
|
||||||
|
memory-region = <&cdsp_mem &q6_cdsp_dtb_mem &global_sync_mem>;
|
||||||
|
|
||||||
|
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||||
|
clock-names = "xo";
|
||||||
|
|
||||||
|
qcom,signal-aop;
|
||||||
|
qcom,qmp = <&aoss_qmp>;
|
||||||
|
|
||||||
|
interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>,
|
||||||
|
<&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
|
||||||
|
interconnect-names = "rproc_ddr", "crypto_ddr";
|
||||||
|
|
||||||
|
/* Inputs from turing */
|
||||||
|
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||||
|
<&cdsp_smp2p_in 0 0>,
|
||||||
|
<&cdsp_smp2p_in 2 0>,
|
||||||
|
<&cdsp_smp2p_in 1 0>,
|
||||||
|
<&cdsp_smp2p_in 3 0>;
|
||||||
|
|
||||||
|
interrupt-names = "wdog",
|
||||||
|
"fatal",
|
||||||
|
"handover",
|
||||||
|
"ready",
|
||||||
|
"stop-ack";
|
||||||
|
|
||||||
|
/* Outputs to turing */
|
||||||
|
qcom,smem-states = <&cdsp_smp2p_out 0>;
|
||||||
|
qcom,smem-state-names = "stop";
|
||||||
|
|
||||||
|
glink-edge {
|
||||||
|
qcom,remote-pid = <5>;
|
||||||
|
transport = "smem";
|
||||||
|
mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP
|
||||||
|
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||||
|
mbox-names = "cdsp_smem";
|
||||||
|
interrupt-parent = <&ipcc_mproc>;
|
||||||
|
interrupts = <IPCC_CLIENT_CDSP
|
||||||
|
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||||
|
IRQ_TYPE_EDGE_RISING>;
|
||||||
|
|
||||||
|
label = "cdsp";
|
||||||
|
qcom,glink-label = "cdsp";
|
||||||
|
|
||||||
|
qcom,cdsp_qrtr {
|
||||||
|
qcom,glink-channels = "IPCRTR";
|
||||||
|
qcom,intents = <0x800 5
|
||||||
|
0x2000 3
|
||||||
|
0x4400 2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
qcom,msm_cdsprm_rpmsg {
|
||||||
|
compatible = "qcom,msm-cdsprm-rpmsg";
|
||||||
|
qcom,glink-channels = "cdsprmglink-apps-dsp";
|
||||||
|
qcom,intents = <0x20 12>;
|
||||||
|
|
||||||
|
msm_cdsp_rm: qcom,msm_cdsp_rm {
|
||||||
|
compatible = "qcom,msm-cdsp-rm";
|
||||||
|
qcom,qos-cores = <0 1>;
|
||||||
|
qcom,qos-latency-us = <70>;
|
||||||
|
qcom,qos-maxhold-ms = <20>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
qcom,msm_fastrpc_rpmsg {
|
||||||
|
compatible = "qcom,msm-fastrpc-rpmsg";
|
||||||
|
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||||
|
qcom,intents = <0x64 64>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
thermal_zones: thermal-zones {
|
thermal_zones: thermal-zones {
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
Reference in New Issue
Block a user