diff --git a/qcom/tuna-rumi.dtsi b/qcom/tuna-rumi.dtsi index c72f91ac..e6ac068f 100644 --- a/qcom/tuna-rumi.dtsi +++ b/qcom/tuna-rumi.dtsi @@ -130,3 +130,47 @@ &qupv3_se7_2uart { qcom,rumi_platform; }; + +&GOLD_OFF_CL0 { + status = "disabled"; +}; + +&GOLD_OFF_CL1 { + status = "disabled"; +}; + +&GOLD_OFF_CL2 { + status = "disabled"; +}; + +&GOLD_RAIL_OFF_CL0 { + status = "disabled"; +}; + +&GOLD_RAIL_OFF_CL1 { + status = "disabled"; +}; + +&GOLD_RAIL_OFF_CL2 { + status = "disabled"; +}; + +&GOLD_PLUS_OFF { + status = "disabled"; +}; + +&GOLD_PLUS_RAIL_OFF { + status = "disabled"; +}; + +&CLUSTER_PWR_DN { + status = "disabled"; +}; + +&CX_RET { + status = "disabled"; +}; + +&APSS_OFF { + status = "disabled"; +}; diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi index 0833118d..47ff55ec 100644 --- a/qcom/tuna.dtsi +++ b/qcom/tuna.dtsi @@ -60,7 +60,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x0>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL0 &GOLD_RAIL_OFF_CL0>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_0>; L2_0: l2-cache { @@ -79,7 +82,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x100>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL0 &GOLD_RAIL_OFF_CL0>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_1>; L2_1: l2-cache { @@ -94,7 +100,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x200>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL1 &GOLD_RAIL_OFF_CL1>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_2>; L2_2: l2-cache { @@ -108,7 +117,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x300>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL1 &GOLD_RAIL_OFF_CL1>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_3>; L2_3: l2-cache { @@ -122,7 +134,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x400>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL1 &GOLD_RAIL_OFF_CL1>; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_4>; L2_4: l2-cache { @@ -136,7 +151,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x500>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL2 &GOLD_RAIL_OFF_CL2>; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_5>; L2_5: l2-cache { @@ -150,7 +168,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x600>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_OFF_CL2 &GOLD_RAIL_OFF_CL2>; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_6>; L2_6: l2-cache { @@ -164,7 +185,10 @@ device_type = "cpu"; compatible = "qcom,kryo"; reg = <0x0 0x700>; - enable-method = "spin-table"; /* TODO: Update to psci */ + enable-method = "psci"; + cpu-idle-states = <&GOLD_PLUS_OFF &GOLD_PLUS_RAIL_OFF>; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0xE3940000>; next-level-cache = <&L2_7>; L2_7: l2-cache { @@ -217,6 +241,117 @@ }; }; + idle-states { + entry-method = "psci"; + + GOLD_OFF_CL0: gold-cluster0-c3 { /* C3 */ + compatible = "arm,idle-state"; + idle-state-name = "pc"; + entry-latency-us = <400>; + exit-latency-us = <1100>; + min-residency-us = <4011>; + arm,psci-suspend-param = <0x40000003>; + local-timer-stop; + }; + + GOLD_RAIL_OFF_CL0: gold-cluster0-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <550>; + exit-latency-us = <1050>; + min-residency-us = <7951>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + GOLD_OFF_CL1: gold-cluster1-c3 { /* C3 */ + compatible = "arm,idle-state"; + idle-state-name = "pc"; + entry-latency-us = <400>; + exit-latency-us = <1100>; + min-residency-us = <4011>; + arm,psci-suspend-param = <0x40000003>; + local-timer-stop; + }; + + GOLD_RAIL_OFF_CL1: gold-cluster1-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <550>; + exit-latency-us = <1050>; + min-residency-us = <7951>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + GOLD_OFF_CL2: gold-cluster2-c3 { /* C3 */ + compatible = "arm,idle-state"; + idle-state-name = "pc"; + entry-latency-us = <400>; + exit-latency-us = <1100>; + min-residency-us = <4011>; + arm,psci-suspend-param = <0x40000003>; + local-timer-stop; + }; + + GOLD_RAIL_OFF_CL2: gold-cluster2-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <550>; + exit-latency-us = <1050>; + min-residency-us = <7951>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + GOLD_PLUS_OFF: gold-plus-c3 { /* C3 */ + compatible = "arm,idle-state"; + idle-state-name = "pc"; + entry-latency-us = <450>; + exit-latency-us = <1200>; + min-residency-us = <6230>; + arm,psci-suspend-param = <0x40000003>; + local-timer-stop; + }; + + GOLD_PLUS_RAIL_OFF: gold-plus-cluster3-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <500>; + exit-latency-us = <1350>; + min-residency-us = <7480>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + CLUSTER_PWR_DN: cluster-d4 { /* D4 */ + compatible = "domain-idle-state"; + idle-state-name = "l3-off"; + entry-latency-us = <750>; + exit-latency-us = <2350>; + min-residency-us = <9144>; + arm,psci-suspend-param = <0x41000044>; + }; + + CX_RET: cx-ret { /* Cx Ret */ + compatible = "domain-idle-state"; + idle-state-name = "cx-ret"; + entry-latency-us = <1561>; + exit-latency-us = <2801>; + min-residency-us = <8550>; + arm,psci-suspend-param = <0x41001344>; + }; + + APSS_OFF: cluster-e3 { /* E3 */ + compatible = "domain-idle-state"; + idle-state-name = "llcc-off"; + entry-latency-us = <2800>; + exit-latency-us = <4400>; + min-residency-us = <10150>; + arm,psci-suspend-param = <0x4100b344>; + }; + }; + soc: soc { }; }; @@ -246,6 +381,56 @@ ranges = <0 0 0 0xffffffff>; compatible = "simple-bus"; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD4: cpu-pd4 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD5: cpu-pd5 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD6: cpu-pd6 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD7: cpu-pd7 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_PWR_DN &CX_RET &APSS_OFF>; + }; + }; + intc: interrupt-controller@17100000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -336,6 +521,7 @@ interrupts = , , ; + power-domains = <&CLUSTER_PD>; apps_rsc_drv2: drv@2 { qcom,drv-id = <2>; @@ -355,6 +541,11 @@ }; }; + cluster-device { + compatible = "qcom,lpm-cluster-dev"; + power-domains = <&CLUSTER_PD>; + }; + cam_rsc: rsc@adc8000 { label = "cam_rsc"; compatible = "qcom,rpmh-rsc";