From cdc4bd658812c03b1302d193799d609a6dab4426 Mon Sep 17 00:00:00 2001 From: Veera Sundaram Sankaran Date: Thu, 20 Jun 2024 15:33:11 -0700 Subject: [PATCH 1/3] ARM: dts: msm: add sde_rscc register offset to cesta for sun target Add the sde_rscc register offset to help in accessing the cesta status registers. Change-Id: I438002605a1bdf3ca06c92f4594a71bce70ef387 Signed-off-by: Veera Sundaram Sankaran --- display/sun-sde.dtsi | 5 +++-- display/trustedvm-sun-sde.dtsi | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index f5413498..72fe00dc 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -210,14 +210,15 @@ sde_cesta: qcom,sde_cesta@0x0af30000 { cell-index = <0>; compatible = "qcom,sde-cesta"; - reg = <0xaf30000 0x60>, + reg = <0x0af20000 0x850>, + <0xaf30000 0x60>, <0xaf31000 0x30>, <0xaf32000 0x30>, <0xaf33000 0x30>, <0xaf34000 0x30>, <0xaf35000 0x30>, <0xaf36000 0x30>; - reg-names = "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5"; + reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5"; clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK_SRC>; diff --git a/display/trustedvm-sun-sde.dtsi b/display/trustedvm-sun-sde.dtsi index 93aa250c..fd827da3 100644 --- a/display/trustedvm-sun-sde.dtsi +++ b/display/trustedvm-sun-sde.dtsi @@ -37,7 +37,8 @@ qcom,sde-vm-exclude-reg-names = "sid_phys"; - qcom,tvm-include-reg = <0xaf30000 0x60>, + qcom,tvm-include-reg = <0x0af20000 0x850>, + <0xaf30000 0x60>, <0xaf31000 0x30>, <0xaf32000 0x30>, <0xaf33000 0x30>, From d06aefb55dc6ded30fed3065f38965633e0a68fa Mon Sep 17 00:00:00 2001 From: Rui Chen Date: Wed, 19 Jun 2024 10:42:28 +0800 Subject: [PATCH 2/3] ARM: dts: msm: add pll_codes_region for secondary DSI PHY Add pll_codes_region propertity for secondary DSI PHY to support DSI dynamic clock switch feature. Change-Id: Iad0635b013094c833f9fb2304b5bbaf728f23360 Signed-off-by: Rui Chen --- display/sun-sde.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index f5413498..0053de33 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -356,4 +356,5 @@ qcom,panel-allow-phy-poweroff; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; + pll_codes_region = <&dsi_pll_codes_data>; }; From ca2fc6dff779024032cfcaba18d85b4f87eb53d4 Mon Sep 17 00:00:00 2001 From: Kirill Shpin Date: Tue, 2 Jul 2024 17:09:50 -0700 Subject: [PATCH 3/3] ARM: dts: msm: add VHM properties to bindings Adds VHM related device tree properties to bindings and documents their meaning and usage. Change-Id: Idc43ba7bcfe1c8d9960aa00b3d807b74789d57f0 Signed-off-by: Kirill Shpin --- bindings/mdss-dsi-panel.yaml | 137 +++++++++++++++++++++++++++++++++++ 1 file changed, 137 insertions(+) diff --git a/bindings/mdss-dsi-panel.yaml b/bindings/mdss-dsi-panel.yaml index f085a963..20ae28ff 100644 --- a/bindings/mdss-dsi-panel.yaml +++ b/bindings/mdss-dsi-panel.yaml @@ -660,6 +660,37 @@ properties: qcom,mdss-dsi-te-using-te-pin: description: Boolean to specify whether using hardware vsync. + qcom,mdss-esync: + description: > + Boolean entry to enable esync. "qcom,mdss-esync-hsync-milli-pulse-width" + property should be set along with this property. + + qcom,mdss-esync-milli-skew: + description: > + u32 entry to specify the skew between the esync signal and the timing + engine, in 1/1000ths of a pulse period. Example: + qcom,mdss-esync-milli-skew = <150>; + This would set the esync signal to precede the timing engine's output by + 0.15 of a pulse period. + default: 0 + + qcom,mdss-esync-hsync-milli-pulse-width: + description: > + u32 entry to specify the pulse width of the hsync portion of the esync + signal, in 1/1000ths of a pulse period. Example: + qcom,mdss-esync-hsync-milli-pulse-width = <750>; + This would set the esync line high for 0.75 of a pulse period, every hsync. + + qcom,mdss-esync-emsync-fps: + description: > + u32 entry to specify how frequently the esync signal should be modulated + with an EM pulse, in Hz. + + qcom,mdss-esync-emsync-milli-pulse-width: + description: > + u32 entry to specify the pulse width of the modulated esync signal, in + 1/1000ths of a pulse period. See "qcom,mdss-esync-hsync-milli-pulse-width". + qcom,qsync-enable: description: Boolean property to indicate if qsync is enabled/disabled. @@ -695,6 +726,79 @@ properties: default: dsi_lp_mode enum: [dsi_lp_mode, dsi_hs_mode] + qcom,mdss-dsi-esync-post-on-commands: + description: > + List of panel resume commands that need to be sent after the esync + generator has been enabled. + Refer to "qcom,mdss-dsi-on-command" section for adding commands. + + qcom,mdss-dsi-sticky_still_en-command: + description: > + Command to enable panel GRAM and write to it in video mode. + + qcom,mdss-dsi-sticky_still_disable-command: + description: > + Command to disable panel GRAM in video mode. + + qcom,mdss-dsi-sticky_on_fly-command: + description: > + Command to enable panel GRAM and write to it for a self refresh for + exactly one frame. + + qcom,mdss-dsi-qsync-freq-step-sequence-interval: + description: > + Array of 3-value tuples that describe the value of the + "qcom,mdss-dsi-qsync-freq-step-sequence" property. + Within each tuple, first value corresponds to the type of frequency + stepping sequence (0 for normal usecase and 1 for video usecase), second + value corresponds to the starting framerate for the sequence (in mHz), + and third value corresponds to the number of steps in the sequence. + + qcom,mdss-dsi-qsync-freq-step-sequence: + description: > + Array of 2-value tuples that describe the framerate and duration of a step + in a sequence. + Within each tuple, first value corresponds to the framerate for this step + in the sequence, and second value corresponds to the duration in frames + of this step. + The tuples are arranged into groups defined by the + "qcom,mdss-dsi-qsync-freq-step-sequence-interval" property, which specifies + the length of a frequency stepping sequence in steps. + + qcom,mdss-dsi-freq-step-pattern1-command: + description: > + List of panel commands to indicate to the panel the beginning of the first + frequency stepping pattern, and information about that pattern. + + qcom,mdss-dsi-freq-step-pattern2-command: + description: > + List of panel commands to indicate to the panel the beginning of the second + frequency stepping pattern, and information about that pattern. + + qcom,mdss-dsi-freq-step-pattern3-command: + description: > + List of panel commands to indicate to the panel the beginning of the third + frequency stepping pattern, and information about that pattern. + + qcom,mdss-dsi-freq-step-pattern4-command: + description: > + List of panel commands to indicate to the panel the beginning of the fourth + frequency stepping pattern, and information about that pattern. + + qcom,mdss-dsi-freq-step-pattern5-command: + description: > + List of panel commands to indicate to the panel the beginning of the fifth + frequency stepping pattern, and information about that pattern. + + qcom,vrr-enable: + description: > + Boolean entry that restricts the inter-vsync frame latching to discrete + boundaries. + + qcom,video-psr-enable: + description: > + Boolean entry to specify that the panel supports GRAM usage in video mode. + qcom,mdss-dsi-te-pin-select: description: > Specifies TE operating mode. @@ -1765,6 +1869,16 @@ examples: mdss-dsi-tx-eot-append; qcom,ulps-enabled; qcom,suspend-ulps-enabled; + qcom,mdss-esync; + qcom,mdss-esync-milli-skew = <150>; + qcom,mdss-esync-hsync-milli-pulse-width = <750>; + qcom,mdss-esync-emsync-fps = <240>; + qcom,mdss-esync-emsync-milli-pulse-width = <300>; + qcom,qsync-enable; + qcom,vrr-enable; + qcom,video-psr-enable; + qcom,dsi-qsync-avr-step-fps = <240>; + qcom,mdss-dsi-qsync-min-refresh-rate = <60>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 02 0A 08]; qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; @@ -1827,6 +1941,29 @@ examples: qcom,mdss-dsi-on-command = [05 01 00 00 a0 00 02 11 00 05 01 00 00 02 00 02 29 00]; qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-esync-post-on-commands = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-sticky_still_en-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-sticky_still_disable-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-sticky_on_fly-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-qsync-freq-step-sequence-interval = + <0 120000 2>, <0 10000 1>; + qcom,mdss-dsi-qsync-freq-step-sequence = + <60000 1>, <10000 1>, + <10000 2>; + qcom,mdss-dsi-freq-step-pattern1-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-freq-step-pattern2-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-freq-step-pattern3-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-freq-step-pattern4-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; + qcom,mdss-dsi-freq-step-pattern5-command = [05 01 00 00 a0 00 02 11 00 + 05 01 00 00 02 00 02 29 00]; qcom,mdss-dsi-timing-switch-command = [ 29 00 00 00 00 00 02 B0 04 29 00 00 00 00 00 02 F1 00];