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ARM: dts: msm: Add memory and clock support for ravelin-VM

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Add memory and clock support for qup for ravelin-VM target.

Change-Id: I8b9fb0a2e1f3be9864ddd074aec5d97d9eda4527
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
This commit is contained in:
Prakash Yadachi
2024-10-18 15:38:53 +05:30
parent 8b1c694a87
commit ba19503906
2 changed files with 26 additions and 7 deletions
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3
qcom/ravelin-qupv3.dtsi
View File

@@ -304,7 +304,8 @@
<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
qcom,gpii-mask = <0x3f>; qcom,static-gpii-mask = <0x1>;
qcom,gpii-mask = <0x3e>;
qcom,ev-factor = <2>; qcom,ev-factor = <2>;
memory-region = <&qup_iommu_region1>; memory-region = <&qup_iommu_region1>;
dma-coherent; dma-coherent;

30
qcom/ravelin-vm.dtsi
View File

@@ -4,6 +4,7 @@
*/ */
#include "waipio-vm.dtsi" #include "waipio-vm.dtsi"
#include <dt-bindings/clock/qcom,gcc-parrot.h>
/ { / {
qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>; qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>;
@@ -33,6 +34,13 @@
status = "disabled"; status = "disabled";
}; };
gcc: clock-controller@100000 {
compatible = "qcom,dummycc";
clock-output-names = "gcc_clocks";
#clock-cells = <1>;
#reset-cells = <1>;
};
vgic: interrupt-controller@17200000 { vgic: interrupt-controller@17200000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
interrupt-controller; interrupt-controller;
@@ -69,7 +77,8 @@
/delete-node/ spi@990000; /delete-node/ spi@990000;
qup_iommu_group: qup_common_iommu_group { qup_iommu_group: qup_common_iommu_group {
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>; iommu-addresses = <&gpi_dma0 0x00000000 0x00020000>,
<&qupv3_0 0x00000000 0x00020000>;
}; };
gpi_dma0: qcom,gpi-dma@900000 { gpi_dma0: qcom,gpi-dma@900000 {
@@ -79,6 +88,7 @@
reg-names = "gpi-top"; reg-names = "gpi-top";
iommus = <&apps_smmu 0x178 0x0>; iommus = <&apps_smmu 0x178 0x0>;
qcom,iommu-group = <&qup_iommu_group>; qcom,iommu-group = <&qup_iommu_group>;
memory-region = <&qup_iommu_group>;
dma-coherent; dma-coherent;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
@@ -93,7 +103,8 @@
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
qcom,max-num-gpii = <12>; qcom,max-num-gpii = <12>;
qcom,gpii-mask = <0x40>; qcom,static-gpii-mask = <0x20>;
qcom,gpii-mask = <0x0>;
qcom,ev-factor = <2>; qcom,ev-factor = <2>;
qcom,gpi-ee-offset = <0x10000>; qcom,gpi-ee-offset = <0x10000>;
qcom,le-vm; qcom,le-vm;
@@ -105,9 +116,16 @@
qupv3_0: qcom,qupv3_0_geni_se@9c0000 { qupv3_0: qcom,qupv3_0_geni_se@9c0000 {
compatible = "qcom,geni-se-qup"; compatible = "qcom,geni-se-qup";
reg = <0x9c0000 0x2000>; reg = <0x9c0000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
iommus = <&apps_smmu 0x178 0x0>; iommus = <&apps_smmu 0x178 0x0>;
qcom,iommu-group = <&qup_iommu_group>; qcom,iommu-group = <&qup_iommu_group>;
memory-region = <&qup_iommu_group>;
dma-coherent; dma-coherent;
ranges;
status = "ok"; status = "ok";
/* Legacy Touch over I2C */ /* Legacy Touch over I2C */
@@ -116,8 +134,8 @@
reg = <0x984000 0x4000>; reg = <0x984000 0x4000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
dmas = <&gpi_dma0 0 1 3 64 0>, dmas = <&gpi_dma0 0 1 3 64 0xe>,
<&gpi_dma0 1 1 3 64 0>; <&gpi_dma0 1 1 3 64 0xe>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
qcom,le-vm; qcom,le-vm;
status = "disabled"; status = "disabled";
@@ -129,8 +147,8 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg-names = "se_phys"; reg-names = "se_phys";
dmas = <&gpi_dma0 0 1 1 64 0>, dmas = <&gpi_dma0 0 1 1 64 0xe>,
<&gpi_dma0 1 1 1 64 0>; <&gpi_dma0 1 1 1 64 0xe>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
qcom,le-vm; qcom,le-vm;