From b767fb4f68507174b6f521a19ac825bdb2370da9 Mon Sep 17 00:00:00 2001
From: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
Date: Mon, 25 Mar 2024 15:57:34 +0530
Subject: [PATCH] ARM: dts: qcom: update thermal zone trips for tsens for
 sun-tp

Update various thermal zone trip thresholds for all tsens for
sun thermal profile package based on latest recommendation.

Change-Id: I73beefbd4d590bc749e77ba5d4b97d74c5afbe43
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
---
 qcom/sun-tp.dtsi | 542 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 542 insertions(+)

diff --git a/qcom/sun-tp.dtsi b/qcom/sun-tp.dtsi
index 12fbf138..327e4d0d 100644
--- a/qcom/sun-tp.dtsi
+++ b/qcom/sun-tp.dtsi
@@ -8,3 +8,545 @@
 	compatible = "qcom,sun";
 	qcom,msm-id = <0x100026a 0x10000>;
 };
+
+&thermal_zones {
+	aoss-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-0-0 {
+		trips {
+			cpu0-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu0-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-0-1 {
+		trips {
+			cpu0-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu0-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-1-0 {
+		trips {
+			cpu1-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu1-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-1-1 {
+		trips {
+			cpu1-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu1-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-2-0 {
+		trips {
+			cpu2-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu2-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-2-1 {
+		trips {
+			cpu2-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu2-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-3-0 {
+		trips {
+			cpu3-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu3-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-3-1 {
+		trips {
+			cpu3-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu3-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-4-0 {
+		trips {
+			cpu4-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu4-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-4-1 {
+		trips {
+			cpu4-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu4-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-5-0 {
+		trips {
+			cpu5-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu5-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-0-5-1 {
+		trips {
+			cpu5-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu5-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpuss-0-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpuss-0-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	aoss-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-1-0-0 {
+		trips {
+			cpu6-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu6-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-1-0-1 {
+		trips {
+			cpu6-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu6-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-1-1-0 {
+		trips {
+			cpu7-emerg0-cfg {
+				temperature = <118000>;
+			};
+
+			cpu7-emerg0-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpu-1-1-1 {
+		trips {
+			cpu7-emerg1-cfg {
+				temperature = <118000>;
+			};
+
+			cpu7-emerg1-1-cfg {
+				temperature = <120000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpuss-1-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	cpuss-1-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphvx-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphvx-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphvx-2 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphmx-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphmx-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphmx-2 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	nsphmx-3 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	ddr {
+		trips {
+			ddr0-config {
+				temperature = <100000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	aoss-2 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-0 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-1 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-2 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-3 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-4 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-5 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-6 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	gpuss-7 {
+		trips {
+			tj_cfg {
+				temperature = <105000>;
+			};
+
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	mdmss-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	mdmss-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	mdmss-2 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	mdmss-3 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	camera-0 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	camera-1 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	video {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+
+	aoss-3 {
+		trips {
+			reset-mon-cfg {
+				temperature = <125000>;
+			};
+		};
+	};
+};