From b74489855bfe8d6287f55b403d9768331d422ca1 Mon Sep 17 00:00:00 2001
From: Jinfeng Gu <quic_gjinfeng@quicinc.com>
Date: Fri, 19 Jan 2024 13:39:41 +0800
Subject: [PATCH] ARM: dts: msm: enable esd check on sun target

This change enable esd check on sun target.

Change-Id: I55cbf46247370b31a192b8350a60994d727d48d5
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
---
 display/sun-sde-display-common.dtsi | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi
index 23bce180..54797f5e 100644
--- a/display/sun-sde-display-common.dtsi
+++ b/display/sun-sde-display-common.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi"
@@ -349,6 +349,12 @@
 &dsi_nt37801_amoled_cmd {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
 	qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
+	qcom,esd-check-enabled;
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x9c>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
@@ -369,6 +375,12 @@
 
 &dsi_nt37801_amoled_video_cphy {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
+	qcom,esd-check-enabled;
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x9c>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
@@ -382,6 +394,12 @@
 
 &dsi_nt37801_amoled_cmd_cphy {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
+	qcom,esd-check-enabled;
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x9c>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {
@@ -396,6 +414,12 @@
 &dsi_nt37801_amoled_video {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
 	qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
+	qcom,esd-check-enabled;
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x9c>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
 
 	qcom,mdss-dsi-display-timings {
 		timing@0 {