From 0f225510730ed23db8ecf56914383aa3d2fd96ab Mon Sep 17 00:00:00 2001 From: "Alan Z. Chen" Date: Wed, 12 Feb 2025 16:21:53 -0800 Subject: [PATCH 1/3] ARM: dts: msm: Change VREG mapping string names Change VREG mapping string names to be in line with the string names sent from FW. Change-Id: Iea6e1e60295d212f367a686244e51f45f850cdf0 CRs-Fixed: 4074221 --- canoe-peach-cnss.dtsi | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/canoe-peach-cnss.dtsi b/canoe-peach-cnss.dtsi index db03cf53..0b7d7c0f 100644 --- a/canoe-peach-cnss.dtsi +++ b/canoe-peach-cnss.dtsi @@ -170,22 +170,22 @@ <7500 2188800>; qcom,vreg_pdc_map = - "s1j", "bb", - "s2j", "rf", - "s7f", "rf", - "s8f", "rf"; + "S1J1", "bb", + "S2J1", "rf", + "S7F0", "rf", + "S8F0", "rf"; qcom,pmu_vreg_map = - "VDD_PMU_AON_I", "s2j", - "VDD09_PMU_RFA_I", "s2j", - "VDD19_PMU_RFA_I", "s8f", - "VDD13_PMU_RFA_I", "s7f", - "VDD095_MX_PMU", "s2j", - "VDD095_PMU_CX", "s1j", - "VDD095_PMU_BTCX", "s2j", - "VDD095_PMU_BTMX", "s2j", - "VDD13_PMU_PCIE_I", "s7f", - "VDD13_PMU_PCIE12_I", "s7f"; + "VDDD_AON_0P9", "S2J1", + "VDDA_RFA_0P9", "S2J1", + "VDDA_RFA_1P9", "S8F0", + "VDDA_RFA_1P3", "S7F0", + "VDDD_WLMX_0P9", "S2J1", + "VDDD_WLCX_0P9", "S1J1", + "VDDD_BTCX_0P9", "S2J1", + "VDDD_BTCMX_0P9", "S2J1", + "VDDA_PCIE_0P9", "S7F0", + "VDDA_PCIE_1P2", "S7F0"; /* cpu mask used for wlan tx rx interrupt affinity * From f6843ebbb75b9035d44459048a3283629b040c43 Mon Sep 17 00:00:00 2001 From: AMAN KUMAR Date: Tue, 25 Feb 2025 17:59:00 +0530 Subject: [PATCH 2/3] ARM: dts: msm: support of KaM soc id for canoe This change adds support of KaM soc Change-Id: Id874bcdc187f9af814ba6db0f28cba0d3860298e --- canoe-kiwi-cnss.dts | 6 ++++-- canoe-peach-cnss.dts | 5 +++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/canoe-kiwi-cnss.dts b/canoe-kiwi-cnss.dts index 8f8d5e5c..ad90b8e5 100644 --- a/canoe-kiwi-cnss.dts +++ b/canoe-kiwi-cnss.dts @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -14,6 +14,8 @@ compatible = "qcom,canoe", "qcom,canoep", "qcom,canoe-mtp", "qcom,canoe-cdp"; qcom,msm-id = <0x294 0x10000>, <0x294 0x20000>, <0x295 0x10000>, <0x295 0x20000>, <0x1000294 0x10000>, <0x1000294 0x20000>, - <0x1000295 0x10000>, <0x1000295 0x20000>; + <0x1000295 0x10000>, <0x1000295 0x20000>, + <704 0x10000>, <704 0x20000>, + <0x10002C0 0x10000>, <0x10002C0 0x20000>; qcom,board-id = <0x30001 0>, <0x20008 0>, <0x30015 0>; }; diff --git a/canoe-peach-cnss.dts b/canoe-peach-cnss.dts index 2b721aa4..4837bee9 100644 --- a/canoe-peach-cnss.dts +++ b/canoe-peach-cnss.dts @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -14,7 +14,8 @@ compatible = "qcom,canoe", "qcom,canoep"; qcom,msm-id = <0x294 0x10000>, <0x294 0x20000>, <0x295 0x10000>, <0x295 0x20000>, <0x1000294 0x10000>, <0x1000294 0x20000>, <0x1000295 0x10000>, - <0x1000295 0x20000>; + <0x1000295 0x20000>, <704 0x10000>, <704 0x20000>, + <0x10002C0 0x10000>, <0x10002C0 0x20000>; qcom,board-id = <1 0>, <0x20001 0>, <8 0>, <0x30008 0>, <0x40008 0>, <0x50008 0>, <0x60008 0>, <0x21 0>, <11 0>, <0x2000B 0>, <0x15 0>, <0x20015 0>, <0x30015 0>; From e804cdf8e344e4df3ee1b71995db81432d0113f4 Mon Sep 17 00:00:00 2001 From: Prateek Patil Date: Thu, 20 Mar 2025 11:32:24 +0530 Subject: [PATCH 3/3] ARM: dts: msm: Add pinctrl string for SW_CTRL GPIO Add pinctrl string for SW_CTRL GPIO. Change-Id: I291c1c103ca0454b3616efb66b46c357494d19ae CRs-Fixed: 4090490 --- kera-wcn7750.dtsi | 1 + tuna-wcn7750.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/kera-wcn7750.dtsi b/kera-wcn7750.dtsi index 2ea94bdf..c83a831f 100644 --- a/kera-wcn7750.dtsi +++ b/kera-wcn7750.dtsi @@ -70,6 +70,7 @@ sw-ctrl-gpio = <81>; /* List of GPIOs to be setup for interrupt wakeup capable */ mpm_wake_set_gpios = <81>; + pin_sw-ctrl-gpio = <&tlmm 81 0>; pinctrl-names = "sw_ctrl"; pinctrl-0 = <&icnss_sw_ctrl>; diff --git a/tuna-wcn7750.dtsi b/tuna-wcn7750.dtsi index d0c3f1e4..e4ffa766 100644 --- a/tuna-wcn7750.dtsi +++ b/tuna-wcn7750.dtsi @@ -66,6 +66,7 @@ sw-ctrl-gpio =<80>; /* List of GPIOs to be setup for interrupt wakeup capable */ mpm_wake_set_gpios = <80>; + pin_sw-ctrl-gpio = <&tlmm 80 0>; pinctrl-names = "sw_ctrl"; pinctrl-0 = <&icnss_sw_ctrl>;