From af6a9588245f32ac0d3a1f4b64bd0ffc6dbedd1b Mon Sep 17 00:00:00 2001 From: Anil Veshala Veshala Date: Tue, 5 Mar 2024 08:00:24 -0800 Subject: [PATCH] ARM: dts: msm: Correct the ibi interrupt number Currently ibi gpii irq configured wrongly, due to this ibi controller doesn't generates irq. To solve this rectified the gpii irq number. Change-Id: I05c7f41463c19ffbf095c2ec6d217210f8d2aa8f Signed-off-by: Anil Veshala Veshala --- qcom/sun-qupv3.dtsi | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/qcom/sun-qupv3.dtsi b/qcom/sun-qupv3.dtsi index 8339e909..b71e8707 100644 --- a/qcom/sun-qupv3.dtsi +++ b/qcom/sun-qupv3.dtsi @@ -133,7 +133,7 @@ pinctrl-1 = <&qupv3_se0_i3c_sda_sleep>, <&qupv3_se0_i3c_scl_sleep>; pinctrl-2 = <&qupv3_se0_i3c_disable>; interrupts-extended = <&intc GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 31 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 61 IRQ_TYPE_LEVEL_HIGH>, <&pdc 30 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>; #size-cells = <0>; @@ -208,7 +208,7 @@ pinctrl-1 = <&qupv3_se1_i3c_sda_sleep>, <&qupv3_se1_i3c_scl_sleep>; pinctrl-2 = <&qupv3_se1_i3c_disable>; interrupts-extended = <&intc GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 33 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 62 IRQ_TYPE_LEVEL_HIGH>, <&pdc 32 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>; #size-cells = <0>; @@ -378,7 +378,7 @@ pinctrl-1 = <&qupv3_se4_i3c_sda_sleep>, <&qupv3_se4_i3c_scl_sleep>; pinctrl-2 = <&qupv3_se4_i3c_disable>; interrupts-extended = <&intc GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 35 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 63 IRQ_TYPE_LEVEL_HIGH>, <&pdc 34 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>; #size-cells = <0>; @@ -615,7 +615,6 @@ pinctrl-2 = <&qupv3_se8_i3c_disable>; interrupts-extended = <&intc GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, <&pdc 64 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 37 IRQ_TYPE_LEVEL_HIGH>, <&pdc 36 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>; #size-cells = <0>; @@ -690,7 +689,7 @@ pinctrl-1 = <&qupv3_se9_i3c_sda_sleep>, <&qupv3_se9_i3c_scl_sleep>; pinctrl-2 = <&qupv3_se9_i3c_disable>; interrupts-extended = <&intc GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 48 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 65 IRQ_TYPE_LEVEL_HIGH>, <&pdc 47 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>; #size-cells = <0>; @@ -1077,7 +1076,7 @@ pinctrl-1 = <&qupv3_se15_i3c_sda_sleep>, <&qupv3_se15_i3c_scl_sleep>; pinctrl-2 = <&qupv3_se15_i3c_disable>; interrupts-extended = <&intc GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 50 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 66 IRQ_TYPE_LEVEL_HIGH>, <&pdc 49 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>; #size-cells = <0>;