From af53bd39cff8fb45e431687ecf9bb54cbd4f9e70 Mon Sep 17 00:00:00 2001 From: Prudhvi Yarlagadda Date: Wed, 24 Jan 2024 11:51:03 -0800 Subject: [PATCH] ARM: dts: msm: PCIe SM related power control override We need to override the PCIe SM PWR_CTRL and PWR_CTRL_MASK registers so that CXPC can happen when pcie driver is not probed. Without this change, CXPC will be blocked when the pcie driver is not probed as there will be no notification from PCIe SM entity to allow CXPC. Once we these registers are written 0x1, no one will wait for PCIe SM to allow CXPC. Change-Id: I8d1542deb4fcc10849c848aa73718a47af556719 Signed-off-by: Prudhvi Yarlagadda --- qcom/sun.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index 5b1c3df4..e5529927 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -35,7 +35,7 @@ chosen: chosen { - bootargs = "log_buf_len=512K loglevel=6 cpufreq.default_governor=performance sysctl.kernel.sched_pelt_multiplier=4 no-steal-acc kpti=0 swiotlb=0 loop.max_part=7 irqaffinity=0-1 pcie_ports=compat mem-offline.bypass_send_msg=1 printk.console_no_auto_verbose=1 kasan=off rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kernel.panic_on_rcu_stall=1 fw_devlink.strict=1 can.stats_timer=0"; + bootargs = "log_buf_len=512K loglevel=6 cpufreq.default_governor=performance sysctl.kernel.sched_pelt_multiplier=4 no-steal-acc kpti=0 swiotlb=0 loop.max_part=7 irqaffinity=0-1 pcie_ports=compat mem-offline.bypass_send_msg=1 printk.console_no_auto_verbose=1 kasan=off rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kernel.panic_on_rcu_stall=1 fw_devlink.strict=1 can.stats_timer=0 pci-msm-drv.pcie_sm_regs=0x1D07000,0x1040,0x1048,0x3000,0x1"; stdout-path = "/soc/qcom,qupv3_1_geni_se@ac0000/qcom,qup_uart@a9c000:115200n8"; };