diff --git a/Kbuild b/Kbuild
old mode 100644
new mode 100755
index 7a752447..935d4f5b
--- a/Kbuild
+++ b/Kbuild
@@ -25,6 +25,10 @@ endif
 ifeq ($(CONFIG_ARCH_PARROT), y)
 dtbo-y += parrot/parrot-dsp.dtbo
 endif
+
+ifeq ($(CONFIG_ARCH_RAVELIN), y)
+dtbo-y += ravelin/ravelin-dsp.dtbo
+endif
 always-y	:= $(dtb-y) $(dtbo-y)
 subdir-y	:= $(dts-dirs)
 clean-files	:= *.dtb *.dtbo
diff --git a/ravelin/ravelin-dsp.dts b/ravelin/ravelin-dsp.dts
new file mode 100755
index 00000000..ea175f58
--- /dev/null
+++ b/ravelin/ravelin-dsp.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+/dts-v1/;
+/plugin/;
+
+#include "ravelin-dsp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. ravelin v1 SoC";
+	compatible = "qcom,ravelin";
+	qcom,msm-id = <568 0x10000>;
+	qcom,board-id = <0 0>;
+};
diff --git a/ravelin/ravelin-dsp.dtsi b/ravelin/ravelin-dsp.dtsi
new file mode 100755
index 00000000..70d0c74a
--- /dev/null
+++ b/ravelin/ravelin-dsp.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+&glink_edge {
+	qcom,fastrpc {
+		compatible = "qcom,fastrpc";
+		qcom,glink-channels = "fastrpcglink-apps-dsp";
+		qcom,intents = <0x64 64>;
+		label = "adsp";
+		memory-region = <&adsp_mem_heap>;
+		qcom,vmids = <22 37>;
+
+		compute-cb@1 {
+			compatible = "qcom,fastrpc-compute-cb";
+			reg = <3>;
+			label = "adsprpc-smd";
+			iommus = <&apps_smmu 0x1003 0x0>;
+			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
+			qcom,iommu-faults = "stall-disable", "HUPCF";
+			dma-coherent;
+			pd-type = <1>;	/* ROOT_PD */
+		};
+
+		compute-cb@2 {
+			compatible = "qcom,fastrpc-compute-cb";
+			reg = <4>;
+			label = "adsprpc-smd";
+			iommus = <&apps_smmu 0x1004 0x0>;
+			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
+			qcom,iommu-faults = "stall-disable", "HUPCF";
+			dma-coherent;
+			qcom,nsessions = <4>;
+			pd-type = <3>;	/* SENSORS_STATICPD */
+		};
+
+		compute-cb@3 {
+			compatible = "qcom,fastrpc-compute-cb";
+			reg = <5>;
+			label = "adsprpc-smd";
+			iommus = <&apps_smmu 0x1005 0x0>;
+			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
+			qcom,iommu-faults = "stall-disable", "HUPCF";
+			dma-coherent;
+			pd-type = <2>;	/* AUDIO_STATICPD */
+		};
+	};
+};