From 5c5fb0afd78dcac86fdaba650d0c5fa719775b99 Mon Sep 17 00:00:00 2001
From: Minghao Zhang <quic_minghao@quicinc.com>
Date: Fri, 29 Mar 2024 15:07:07 +0800
Subject: [PATCH 1/2] dt-bindings: Update dt-binding for cpuss sleep stats v4

This change updates dt-bindings for qcom_cpuss_sleep_stats_v4 driver
that lpm count and residency can be read.

Change-Id: Ia5dc8fc905610a61561dfba0e8235a4d9dddcf9c
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
---
 bindings/soc/qcom/cpuss-sleep-stats.yaml | 33 +++++++++++++++++++-----
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/bindings/soc/qcom/cpuss-sleep-stats.yaml b/bindings/soc/qcom/cpuss-sleep-stats.yaml
index 9803b839..46b007d3 100644
--- a/bindings/soc/qcom/cpuss-sleep-stats.yaml
+++ b/bindings/soc/qcom/cpuss-sleep-stats.yaml
@@ -7,19 +7,21 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
 title: Qualcomm Technologies, Inc. cpuss sleep stats
 
 maintainers:
-        - Maulik Shah <quic_mkshah@quicinc.com>
+  - Maulik Shah <quic_mkshah@quicinc.com>
+  - Minghao Zhang <quic_minghao@quicinc.com>
 
 description:
- The low power mode counts and residency in the low power mode is maintained in
- the hardware. The cpu sleep stats allows to read this configuration and display
- the same.
- This driver creates debugfs entry for all enabled lpm and provide LPM count and
- Residency.
+  The low power mode counts and residency in the low power mode is maintained in
+  the hardware. The cpu sleep stats allows to read this configuration and display
+  the same.
+  This driver creates debugfs entry for all enabled lpm and provide LPM count and
+  residency.
 
 properties:
   compatible:
     enum:
       - qcom,cpuss-sleep-stats
+      - qcom,cpuss-sleep-stats-v4
 
   reg:
     maxItems: 10
@@ -37,6 +39,7 @@ properties:
       - const: seq_lpm_cntr_cfg_cpu7
       - const: l3_seq_lpm_cntr_cfg
       - const: apss_seq_mem_base
+      - const: base
 
   num-cpus:
    const: 8
@@ -46,7 +49,16 @@ required:
   - compatible
   - reg
   - reg-names
-  - num-cpus
+
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - qcom,cpuss-sleep-stats
+then:
+  required:
+    - num-cpus
 
 allOf:
   - if:
@@ -84,3 +96,10 @@ examples:
                     "l3_seq_lpm_cntr_cfg", "apss_seq_mem_base";
         num-cpus = <8>;
      };
+
+  - |
+    cpuss-sleep-stats@17850000 {
+      compatible = "qcom,cpuss-sleep-stats-v4";
+      reg = <0x17850000 0x4000>;
+      reg-names = "base";
+    };

From 44e4da3d63bc50e11da9cb9c20cf85efd72591b8 Mon Sep 17 00:00:00 2001
From: Minghao Zhang <quic_minghao@quicinc.com>
Date: Fri, 29 Mar 2024 15:11:41 +0800
Subject: [PATCH 2/2] ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for
 sun

This change add qcom_cpuss_sleep_stats_v4 device.

Change-Id: Iaf226999b468090d4c5af542713a61144caa552b
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
---
 qcom/sun.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index 2b03afd7..3c17a8f5 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -1667,6 +1667,12 @@
 		};
 	};
 
+	cpuss-sleep-stats@17850000 {
+		compatible = "qcom,cpuss-sleep-stats-v4";
+		reg = <0x17850000 0x4000>;
+		reg-names = "base";
+	};
+
 	ram@c3f0000 {
 		compatible = "qcom,rpmh-stats-v4";
 		reg = <0x0c3f0000 0x400>;