From ae98f1e70e069f34c38ac5d9aca8a035358d08cc Mon Sep 17 00:00:00 2001
From: David Collins <quic_collinsd@quicinc.com>
Date: Wed, 25 Oct 2023 14:10:07 -0700
Subject: [PATCH] ARM: dts: qcom: add primary SPMI debug bus for Sun boards

Add an SPMI debug device and associated PMIC child devices for the
primary SPMI interface.  This provides consumers with unrestricted
access to the PMIC registers on pre-production devices.  This helps
to simplify debugging.

Change-Id: I920a3655e0e257ee819c7227e154d27ee43f3250
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
---
 qcom/sun.dtsi | 109 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index 5f1d429d..5e3d084d 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -1646,6 +1646,115 @@
 		status = "disabled";
 	};
 
+	spmi0_debug_bus: spmi-debug@10b14000 {
+		compatible = "qcom,spmi-pmic-arb-debug";
+		reg = <0x10b14000 0x60>, <0x221c8784 0x4>;
+		reg-names = "core", "fuse";
+		clocks = <&aoss_qmp>;
+		clock-names = "core_clk";
+		qcom,fuse-enable-bit = <18>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+		depends-on-supply = <&spmi_bus>;
+		depends-on2-supply = <&pmih010x_glink_debug>;
+
+		pmk8550@0 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x0 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8550@1 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x1 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8550ve@3 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x3 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pmd802x@4 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x4 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8550vs@5 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x5 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8550ve@6 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x6 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pmih010x@7 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x7 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8550ve@8 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x8 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8550vs@9 {
+			compatible = "qcom,spmi-pmic";
+			reg = <0x9 SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pmr735d@a {
+			compatible = "qcom,spmi-pmic";
+			reg = <0xa SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8010@c {
+			compatible = "qcom,spmi-pmic";
+			reg = <0xc SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+
+		pm8010@d {
+			compatible = "qcom,spmi-pmic";
+			reg = <0xd SPMI_USID>;
+			#address-cells = <2>;
+			#size-cells = <0>;
+			qcom,can-sleep;
+		};
+	};
+
 	qcom,msm-adsprpc-mem {
 		compatible = "qcom,msm-adsprpc-mem-region";
 		memory-region = <&adsp_mem_heap>;