From ae20d539444376f4be1619ac903ae4fb51d19d79 Mon Sep 17 00:00:00 2001
From: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Date: Thu, 4 Apr 2024 16:44:01 -0700
Subject: [PATCH] Revert "ARM: dts: msm: Mark GCC clock node as GenPD provider"

This reverts commit c0a6035e47a819e581763724033a65c635618249.

Facing issue where PCIe PHY GDSC is getting turned off when system
suspend is happening. So reverting this change till we find a fix.

Change-Id: Ic4bb32c126e0247688d31e276a9a3f29c373b167
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
---
 qcom/sun.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index e18f9097..8e9d1db3 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -1784,7 +1784,6 @@
 			      "ufs_phy_tx_symbol_0_clk",
 			      "usb3_phy_wrapper_gcc_usb30_pipe_clk";
 		#clock-cells = <1>;
-		#power-domain-cells = <1>;
 		#reset-cells = <1>;
 	};
 
@@ -2014,7 +2013,6 @@
 		qcom,no-status-check-on-disable;
 		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 0>;
 		qcom,support-cfg-gdscr;
-		status = "disabled";
 	};
 
 	gcc_pcie_0_phy_gdsc: qcom,gdsc@16c000 {
@@ -2026,7 +2024,6 @@
 		qcom,no-status-check-on-disable;
 		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 2>;
 		qcom,support-cfg-gdscr;
-		status = "disabled";
 	};
 
 	gcc_ufs_mem_phy_gdsc: qcom,gdsc@19e000 {