diff --git a/bindings/clock/qcom,debugcc.yaml b/bindings/clock/qcom,debugcc.yaml index d22c7d7d..8a8426dc 100644 --- a/bindings/clock/qcom,debugcc.yaml +++ b/bindings/clock/qcom,debugcc.yaml @@ -4,10 +4,11 @@ $id: http://devicetree.org/schemas/clock/qcom,debugcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Technologies, Inc. Debug Clock Controller Binding +title: Qualcomm Technologies, Inc. Debug Clock Controller maintainers: - Xubin Bai + - Vivek Aknurwar description: | Debug Clock Controller module which support debug clock controllers. @@ -16,6 +17,7 @@ properties: compatible: enum: - qcom,pineapple-debugcc + - qcom,sun-debugcc clocks: items: diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index e6a6d66e..2c866313 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -1476,16 +1476,50 @@ #reset-cells = <1>; }; - apsscc: syscon@16450000 { - compatible = "syscon"; - reg = <0x16450000 0x3553000>; - }; - mccc: syscon@240ba000 { compatible = "syscon"; reg = <0x240ba000 0x800>; }; + gxclkctldebugcc: syscon@3d64000 { + compatible = "syscon"; + reg = <0x3d64000 0x6000>; + }; + + debugcc: qcom,cc-debug { + compatible = "qcom,sun-debugcc"; + qcom,gcc = <&gcc>; + qcom,gpucc = <&gpucc>; + qcom,gxclkctl = <&gxclkctldebugcc>; + qcom,videocc = <&videocc>; + qcom,evacc = <&evacc>; + qcom,dispcc = <&dispcc>; + qcom,camcc = <&camcc>; + qcom,cambistmclkcc = <&cambistmclkcc>; + qcom,mccc = <&mccc>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&cambistmclkcc 0>, + <&camcc 0>, + <&dispcc 0>, + <&evacc 0>, + <&gcc 0>, + <&gpucc 0>, + <&gxclkctl 0>, + <&tcsrcc 0>, + <&videocc 0>; + clock-names = "xo_clk_src", + "cambistmclkcc", + "camcc", + "dispcc", + "evacc", + "gcc", + "gpucc", + "gxclkctl", + "tcsrcc", + "videocc"; + #clock-cells = <1>; + }; + /* CAM_CC GDSCs */ cam_cc_ipe_0_gdsc: qcom,gdsc@adf017c { compatible = "qcom,gdsc";