From a8049f5aa98ae884f4e2b8c65cf4b1438faa62e6 Mon Sep 17 00:00:00 2001 From: "Bao D. Nguyen" Date: Wed, 1 Nov 2023 11:32:15 -0700 Subject: [PATCH] ARM: dts: qcom: Correct CPU masks for sun platforms Correct the prime and silver cores mapping. Enable the smmu's iommu-dma-addr-pool to reduce memory usage. Enable the smmu's dma-coherent. Change-Id: I4c28c48b59cc8cf4159969f89d7983d574921a4f Signed-off-by: Bao D. Nguyen --- qcom/sun.dtsi | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index aac9e96c..acc74e5d 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -1520,6 +1520,9 @@ phy-names = "ufsphy"; #reset-cells = <1>; + qcom,prime-mask = <0xc0>; + qcom,silver-mask = <0x3f>; + lanes-per-direction = <2>; dev-ref-clk-freq = <0>; /* 19.2 MHz */ clock-names = @@ -1620,22 +1623,26 @@ iommus = <&apps_smmu 0x60 0x0>; qcom,iommu-dma = "fastmap"; + qcom,iommu-dma-addr-pool = <0x1000 0xFFFFF000>; shared-ice-cfg = <&ice_cfg>; + dma-coherent; qcom,bypass-pbl-rst-wa; status = "disabled"; qos0 { - mask = <0xfc>; + mask = <0xc0>; vote = <44>; perf; - cpu_freq_vote = <2 5 7>; + /* Set CPU6 to fmax, and CPU[6-7] will run at fmax */ + cpu_freq_vote = <6>; }; qos1 { - mask = <0x03>; + mask = <0x3f>; vote = <44>; + /* Set CPU0 to fmax, and CPU[0-5] will run at fmax */ cpu_freq_vote = <0>; }; };