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Merge "ARM: dts: msm: Update gpucc and gx_clkctl clock node as GenPD provider"

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This commit is contained in:
QCTECMDR Service
2024-10-22 01:22:23 -07:00
committed by Gerrit - the friendly Code Review server
parent b6c2e72311 86ee38dfc0
commit a458a9caea
3 changed files with 17 additions and 7 deletions
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3
bindings/clock/qcom,gx_clkctl.yaml
View File

@@ -15,12 +15,13 @@ description: |
See also: See also:
dt-bindings/clock/qcom,gxclkctl-sun.h dt-bindings/clock/qcom,gxclkctl-sun.h
dt-bindings/clock/qcom,gpucc-tuna.h
properties: properties:
compatible: compatible:
enum: enum:
- qcom,sun-gx_clkctl - qcom,sun-gx_clkctl
- qcom,tuna-gx_clkctl
reg: reg:
maxItems: 1 maxItems: 1

8
qcom/tuna-rumi.dtsi
View File

@@ -212,3 +212,11 @@
&video_cc_mvs0c_gdsc { &video_cc_mvs0c_gdsc {
status = "ok"; status = "ok";
}; };
&gpu_cc_cx_gdsc {
status = "ok";
};
&gx_clkctl_gx_gdsc {
status = "ok";
};

13
qcom/tuna.dtsi
View File

@@ -1712,13 +1712,16 @@
"gpll0_out_main_div"; "gpll0_out_main_div";
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
#power-domain-cells = <1>;
}; };
gxclkctl: clock-controller@3d68024 { gxclkctl: clock-controller@3d68024 {
compatible = "qcom,dummycc"; compatible = "qcom,tuna-gx_clkctl";
clock-output-names = "gxclkctl_clocks"; reg = <0x3d68024 0x8>;
#clock-cells = <1>; reg-name = "cc_base";
#reset-cells = <1>; power-domains = <&gpucc GPU_CC_CX_GDSC>;
vdd_gx-supply = <&VDD_GFX_MXC_VOTER_LEVEL>;
#power-domain-cells = <1>;
}; };
tcsrcc: clock-controller@1fbf000 { tcsrcc: clock-controller@1fbf000 {
@@ -3112,12 +3115,10 @@
&gpu_cc_cx_gdsc { &gpu_cc_cx_gdsc {
clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
parent-supply = <&VDD_CX_LEVEL>; parent-supply = <&VDD_CX_LEVEL>;
status = "ok";
}; };
&gx_clkctl_gx_gdsc { &gx_clkctl_gx_gdsc {
parent-supply = <&VDD_GFX_MXC_VOTER_LEVEL>; parent-supply = <&VDD_GFX_MXC_VOTER_LEVEL>;
status = "ok";
}; };
&video_cc_mvs0_gdsc { &video_cc_mvs0_gdsc {