Merge "ARM: dts: msm: Update gpucc and gx_clkctl clock node as GenPD provider"
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@@ -212,3 +212,11 @@
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&video_cc_mvs0c_gdsc {
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status = "ok";
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};
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&gpu_cc_cx_gdsc {
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status = "ok";
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};
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&gx_clkctl_gx_gdsc {
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status = "ok";
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};
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@@ -1712,13 +1712,16 @@
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"gpll0_out_main_div";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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gxclkctl: clock-controller@3d68024 {
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compatible = "qcom,dummycc";
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clock-output-names = "gxclkctl_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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compatible = "qcom,tuna-gx_clkctl";
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reg = <0x3d68024 0x8>;
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reg-name = "cc_base";
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power-domains = <&gpucc GPU_CC_CX_GDSC>;
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vdd_gx-supply = <&VDD_GFX_MXC_VOTER_LEVEL>;
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#power-domain-cells = <1>;
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};
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tcsrcc: clock-controller@1fbf000 {
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@@ -3112,12 +3115,10 @@
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&gpu_cc_cx_gdsc {
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clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
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parent-supply = <&VDD_CX_LEVEL>;
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status = "ok";
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};
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&gx_clkctl_gx_gdsc {
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parent-supply = <&VDD_GFX_MXC_VOTER_LEVEL>;
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status = "ok";
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};
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&video_cc_mvs0_gdsc {
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