Merge "ARM: dts: msm: correct the port mask of mbhc port"

This commit is contained in:
QCTECMDR Service
2025-04-21 22:40:03 -07:00
committed by Gerrit - the friendly Code Review server

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@@ -362,20 +362,16 @@
<2 ADC3 0x1 0 SWRM_TX1_CH3>, <2 ADC3 0x1 0 SWRM_TX1_CH3>,
<3 DMIC0 0x4 0 SWRM_TX2_CH1>, <3 DMIC0 0x4 0 SWRM_TX2_CH1>,
<3 DMIC1 0x8 0 SWRM_TX2_CH2>, <3 DMIC1 0x8 0 SWRM_TX2_CH2>,
<3 MBHC 0x1 0 SWRM_TX2_CH3>, <3 MBHC 0x4 0 SWRM_TX2_CH3>,
<4 DMIC2 0x1 0 SWRM_TX2_CH3>, <4 DMIC2 0x1 0 SWRM_TX2_CH3>,
<4 DMIC3 0x2 0 SWRM_TX2_CH4>, <4 DMIC3 0x2 0 SWRM_TX2_CH4>,
<4 DMIC4 0x3 0 SWRM_TX3_CH1>, <4 DMIC4 0x3 0 SWRM_TX3_CH1>,
<4 DMIC5 0x4 0 SWRM_TX3_CH2>; <4 DMIC5 0x4 0 SWRM_TX3_CH2>;
qcom,swr-tx-port-params = qcom,swr-tx-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE1>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE1>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
qcom,rx-slave = <&wcd9378_rx_slave>; qcom,rx-slave = <&wcd9378_rx_slave>;
qcom,tx-slave = <&wcd9378_tx_slave>; qcom,tx-slave = <&wcd9378_tx_slave>;