ARM: dts: msm: Reserve 32kb to dcc on HLOS for kera

Reserve 32kb to dcc on HLOS for kera.

Change-Id: I926dc00c21e46411785392e08121b08ad116003e
Signed-off-by: songchai <quic_songchai@quicinc.com>
This commit is contained in:
songchai
2025-01-05 18:18:56 -08:00
committed by Rohit Jadhav
parent bf15508f76
commit a218452158

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/soc/qcom,dcc_v2.h>
@@ -20,13 +20,13 @@
dcc: dcc_v2@100ff000 {
compatible = "qcom,dcc-v2";
reg = <0x100ff000 0x1000>,
<0x10084000 0x4000>;
<0x10080000 0x8000>;
status = "disabled";
qcom,transaction_timeout = <0>;
reg-names = "dcc-base", "dcc-ram-base";
dcc-ram-offset = <0x4000>;
dcc-ram-offset = <0x0>;
};
mem_dump {