ARM: dts: msm: Reserve 32kb to dcc on HLOS for kera
Reserve 32kb to dcc on HLOS for kera. Change-Id: I926dc00c21e46411785392e08121b08ad116003e Signed-off-by: songchai <quic_songchai@quicinc.com>
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: BSD-3-Clause
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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/*
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* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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*/
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#include <dt-bindings/soc/qcom,dcc_v2.h>
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#include <dt-bindings/soc/qcom,dcc_v2.h>
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@@ -20,13 +20,13 @@
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dcc: dcc_v2@100ff000 {
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dcc: dcc_v2@100ff000 {
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compatible = "qcom,dcc-v2";
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compatible = "qcom,dcc-v2";
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reg = <0x100ff000 0x1000>,
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reg = <0x100ff000 0x1000>,
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<0x10084000 0x4000>;
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<0x10080000 0x8000>;
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status = "disabled";
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status = "disabled";
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qcom,transaction_timeout = <0>;
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qcom,transaction_timeout = <0>;
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reg-names = "dcc-base", "dcc-ram-base";
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reg-names = "dcc-base", "dcc-ram-base";
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dcc-ram-offset = <0x4000>;
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dcc-ram-offset = <0x0>;
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};
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};
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mem_dump {
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mem_dump {
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