dt-bindings: Update all bindings in YAML format
Add yaml versions of bindings files. Change-Id: I367d0290b2df1e678a2f0e6ace76283de6c74daa Signed-off-by: Gayathri S <quic_sgayathr@quicinc.com>
This commit is contained in:
301
bindings/ipa.yaml
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301
bindings/ipa.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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title: Qualcomm technologies inc. Internet Packet Accelerator
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description:
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Internet Packet Accelerator (IPA) is a programmable protocol
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processor HW block. It is designed to support generic HW processing
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of UL/DL IP packets for various use cases independent of radio technology.
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Required properties:
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IPA node:
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- compatible : "qcom,ipa"
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- reg: Specifies the base physical addresses and the sizes of the IPA
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registers.
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- reg-names: "ipa-base" - string to identify the IPA CORE base registers.
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"bam-base" - string to identify the IPA BAM base registers.
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"a2-bam-base" - string to identify the A2 BAM base registers.
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- pas-ids: specify the image ids of the FW images that needs to be loaded.
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- firmware-names: - String name of the FW images that need to be loaded.
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- memory-regions: - Carved memory regions of the FW images.
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- interrupts: Specifies the interrupt associated with IPA.
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- interrupt-names: "ipa-irq" - string to identify the IPA core interrupt.
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"bam-irq" - string to identify the IPA BAM interrupt.
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"a2-bam-irq" - string to identify the A2 BAM interrupt.
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"msi-irq-rmnet-ctl" - string to identify QMAP MSI interrupt
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"msi-irq-rmnet-ll" - string to identify LL MSI interrupt
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- qcom,ipa-hw-ver: Specifies the IPA hardware version.
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- qcom,ipa-ram-mmap: An array of unsigned integers representing addresses and
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sizes which are used by the driver to access IPA RAM.
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Optional:
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- qcom,tx-poll: Enable performing TX completions in polling mode.
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- qcom,tx-wrapper-cache-max-size: Define the tx warpper cache pool max size,
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if set to zero then the feature is disabled.
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- qcom,tx-napi: Enable usage of NAPI in the TX data path.
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- qcom,lan-rx-napi: Enable NAPI in the LAN RX data path.
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- qcom,ipa-uc-holb-monitor: Enable uC HOLB monitor feature.
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- qcom,ipa-holb-monitor-poll-period: Poll period for HOLB monitor feature.
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- qcom,holb-monitor-max-cnt-wlan: Max stuck count for HOLB on WLAN channel.
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- qcom,holb-monitor-max-cnt-usb: Max stuck count for HOLB on USB channel.
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- qcom,holb-monitor-max-cnt-11ad: Max stuck count for HOLB on 11AD channel.
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- qcom,wan-rx-ring-size: size of WAN rx ring, default is 192
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- qcom,lan-rx-ring-size: size of LAN rx ring, default is 192
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- qcom,arm-smmu: SMMU is present and ARM SMMU driver is used
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- qcom,msm-smmu: SMMU is present and QSMMU driver is used
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- qcom,smmu-fast-map: Boolean context flag to set SMMU to fastpath mode
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- ipa_smmu_ap: AP general purpose SMMU device
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compatible "qcom,ipa-smmu-ap-cb"
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- ipa_smmu_wlan: WDI SMMU device
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compatible "qcom,ipa-smmu-wlan-cb"
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- ipa_smmu_uc: uc SMMU device
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compatible "qcom,ipa-smmu-uc-cb"
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- ipa_smmu_11ad: 11AD SMMU device
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compatible "qcom,ipa-smmu-11ad-cb"
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- qcom,use-a2-service: determine if A2 service will be used
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- qcom,use-ipa-tethering-bridge: determine if tethering bridge will be used
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- qcom,use-ipa-in-mhi-mode: Boolean context flag to indicate whether
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device booting in MHI config or not.
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- qcom,use-ipa-bamdma-a2-bridge: determine if a2/ipa hw bridge will be used
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- qcom,ee: which EE is assigned to (non-secure) APPS from IPA-BAM POV. This
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is a number
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- qcom,ipa-hw-mode: IPA hardware mode - Normal, Virtual memory allocation,
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memory allocation over a PCIe bridge
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-qcom,platform-type: MDM platform, MSM platform or APQ platform
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- qcom,msm-bus,name: String representing the client-name
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- qcom,msm-bus,num-cases: Total number of usecases
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- qcom,msm-bus,active-only: Boolean context flag for requests in active or
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dual (active & sleep) contex
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- qcom,msm-bus,num-paths: Total number of master-slave pairs
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- qcom,msm-bus,vectors-KBps: Arrays of unsigned integers representing:
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master-id, slave-id, arbitrated bandwidth
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in KBps, instantaneous bandwidth in KBps
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- qcom,ipa-bam-remote-mode: Boolean context flag to determine if ipa bam
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is in remote mode.
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- qcom,modem-cfg-emb-pipe-flt: Boolean context flag to determine if modem
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configures embedded pipe filtering rules
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- qcom,skip-uc-pipe-reset: Boolean context flag to indicate whether
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a pipe reset via the IPA uC is required
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- qcom,ipa-wdi2: Boolean context flag to indicate whether
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using wdi-2.0 or not
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- qcom,ipa-wdi3-over-gsi: Boolean context flag to indicate whether
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using wdi-3.0 or not
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- qcom,bandwidth-vote-for-ipa: Boolean context flag to indicate whether
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ipa clock voting is done by bandwidth
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voting via msm-bus-scale driver or not
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- qcom,use-64-bit-dma-mask: Boolean context flag to indicate whether
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using 64bit dma mask or not
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- qcom,use-dma-zone: Boolean context flag to indicate whether memory
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allocations controlled by IPA driver that do not
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specify a struct device * should use GFP_DMA to
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workaround IPA HW limitations
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- qcom,use-rg10-limitation-mitigation: Boolean context flag to activate
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the mitigation to register group 10
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AP access limitation
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- qcom,do-not-use-ch-gsi-20: Boolean context flag to activate
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software workaround for IPA limitation
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to not use GSI physical channel 20
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- qcom,tethered-flow-control: Boolean context flag to indicate whether
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apps based flow control is needed for tethered
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call.
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- qcom,rx-polling-sleep-ms: Receive Polling Timeout in millisecond,
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default is 1 millisecond.
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- qcom,ipa-polling-iteration: IPA Polling Iteration Count,default is 40.
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- qcom,mhi-event-ring-id-limits: Two elements property. Start and End limits
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for MHI event rings ids.
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- qcom,ipa-tz-unlock-reg: Register start addresses and ranges which
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need to be unlocked by TZ.
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- qcom,ipa-uc-monitor-holb: Boolean context flag to indicate whether
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monitoring of holb via IPA uc is required.
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-qcom,ipa-fltrt-not-hashable: Boolean context flag to indicate filter/route rules
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hashing not supported.
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- qcom,wlan-ce-db-over-pcie: Boolean context flag to represent WLAN CE DB
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over pcie bus or not.
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- qcom,ipa-wdi2_over_gsi: Boolean context flag to indicate WDI2 offload over GSI
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supported or not.
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- qcom,register-collection-on-crash: Boolean that controls IPA/GSI register
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collection upon system crash (i.e. SSR).
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- qcom,testbus-collection-on-crash: Boolean that controls testbus register
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collection upon system crash.
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- qcom,non-tn-collection-on-crash: Boolean to control a certain subset of IPA/GSI
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register collection relative to an SSR. Accessing
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these registers can cause stalling, hence this
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control.
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- qcom,entire-ipa-block-size: Complete size of the ipa block in which all
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registers, collected upon crash, reside.
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- qcom,ipa-endp-delay-wa: Boolean context flag to indicate end point delay work around
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supported or not.
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- qcom,secure-debug-check-action: Drives secure memory debug check. Three values allowed:
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0 (use scm call),
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1 (override scm call as though it returned true), and
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2 (override scm call as though it returned false)
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- qcom,ipa-gpi-event-rp-ddr: Boolean context flag to control whether GPI and GCI event
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rings read pointer should be read from the ddr.
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- qcom,rmnet-ll-enable: Flag to indicate low latency data channels should be supported
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for the target
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- qcom,gsi-msi-addr: APSS_GICA_SETSPI_NSR register address for IPA firmware to write
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the MSI IRQ number to get the ISR triggered
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- qcom,gsi-msi-clear-addr: APSS_GICA_CLRSPI_NSR register address for IPA driver to write
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the MSI IRQ number to clear the respective interrupt
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- qcom,gsi-rmnet-ctl-evt-ring-intvec: Integer vector value for the QMAP flow control pipe
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- qcom,gsi-rmnet-ll-evt-ring-intvec: Integer vector value for the low lat data pipe
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IPA pipe sub nodes (A2 static pipes configurations):
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-label: two labels are supported, a2-to-ipa and ipa-to-a2 which
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supply static configuration for A2-IPA connection.
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-qcom,src-bam-physical-address: The physical address of the source BAM
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-qcom,ipa-bam-mem-type:The memory type:
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0(Pipe memory), 1(Private memory), 2(System memory)
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-qcom,src-bam-pipe-index: Source pipe index
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-qcom,dst-bam-physical-address: The physical address of the
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destination BAM
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-qcom,dst-bam-pipe-index: Destination pipe index
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-qcom,data-fifo-offset: Data fifo base offset
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-qcom,data-fifo-size: Data fifo size (bytes)
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-qcom,descriptor-fifo-offset: Descriptor fifo base offset
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-qcom,descriptor-fifo-size: Descriptor fifo size (bytes)
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Optional properties:
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-qcom,ipa-pipe-mem: Specifies the base physical address and the
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size of the IPA pipe memory region.
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Pipe memory is a feature which may be supported by the
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target (HW platform). The Driver support using pipe
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memory instead of system memory. In case this property
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will not appear in the IPA DTS entry, the driver will
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use system memory.
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- clocks: This property shall provide a list of entries each of which
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contains a phandle to clock controller device and a macro that is
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the clock's name in hardware.This should be "clock_rpm" as clock
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controller phandle and "clk_ipa_clk" as macro for "iface_clk"
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- clock-names: This property shall contain the clock input names used
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by driver in same order as the clocks property.This should be "iface_clk"
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- emulator-bar0-offset: Specifies the offset, within PCIe BAR0, where
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IPA/GSI programmable registers reside. This property is used only
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with the IPA/GSI emulation system, which is connected to and
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communicated with via PCIe.
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IPA SMMU sub nodes
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-compatible: "qcom,ipa-smmu-ap-cb" - represents the AP context bank.
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-compatible: "qcom,ipa-smmu-wlan-cb" - represents IPA WLAN context bank.
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-compatible: "qcom,ipa-smmu-uc-cb" - represents IPA uC context bank (for uC
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offload scenarios).
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- qcom,smmu-s1-bypass: Boolean context flag to set SMMU to S1 bypass.
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- dma-coherent: Indicate using dma-coherent or not in SMMU block
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- iommus : the phandle and stream IDs for the SMMU used by this root
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- qcom,iova-mapping: specifies the start address and size of iova space.
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- qcom,additional-mapping: specifies any addtional mapping needed for this
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context bank. The format is <iova pa size>
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IPA SMP2P sub nodes
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-compatible: "qcom,smp2p-map-ipa-1-out" - represents the out smp2p from
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ipa driver to modem.
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-compatible: "qcom,smp2p-map-ipa-1-in" - represents the in smp2p to
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ipa driver from modem.
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Example:
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qcom,ipa@fd4c0000 {
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compatible = "qcom,ipa";
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reg = <0xfd4c0000 0x26000>,
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<0xfd4c4000 0x14818>;
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<0xfc834000 0x7000>;
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reg-names = "ipa-base", "bam-base"; "a2-bam-base";
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interrupts = <0 252 0>,
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<0 253 0>;
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<0 29 1>;
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interrupt-names = "ipa-irq", "bam-irq"; "a2-bam-irq";
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qcom,ipa-hw-ver = <1>;
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clocks = <&clock_rpm clk_ipa_clk>;
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clock-names = "iface_clk";
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qcom,msm-bus,name = "ipa";
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qcom,msm-bus,num-cases = <3>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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<90 512 0 0>, <90 585 0 0>, /* No vote */
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<90 512 100000 800000>, <90 585 100000 800000>, /* SVS */
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<90 512 100000 1200000>, <90 585 100000 1200000>; /* PERF */
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qcom,bus-vector-names = "MIN", "SVS", "PERF";
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qcom,pipe1 {
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label = "a2-to-ipa";
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qcom,src-bam-physical-address = <0xfc834000>;
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qcom,ipa-bam-mem-type = <0>;
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qcom,src-bam-pipe-index = <1>;
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qcom,dst-bam-physical-address = <0xfd4c0000>;
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qcom,dst-bam-pipe-index = <6>;
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qcom,data-fifo-offset = <0x1000>;
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qcom,data-fifo-size = <0xd00>;
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qcom,descriptor-fifo-offset = <0x1d00>;
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qcom,descriptor-fifo-size = <0x300>;
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};
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qcom,pipe2 {
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label = "ipa-to-a2";
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qcom,src-bam-physical-address = <0xfd4c0000>;
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qcom,ipa-bam-mem-type = <0>;
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qcom,src-bam-pipe-index = <7>;
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qcom,dst-bam-physical-address = <0xfc834000>;
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qcom,dst-bam-pipe-index = <0>;
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qcom,data-fifo-offset = <0x00>;
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qcom,data-fifo-size = <0xd00>;
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qcom,descriptor-fifo-offset = <0xd00>;
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qcom,descriptor-fifo-size = <0x300>;
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};
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/* smp2p information */
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qcom,smp2p_map_ipa_1_out {
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compatible = "qcom,smp2p-map-ipa-1-out";
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};
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qcom,smp2p_map_ipa_1_in {
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compatible = "qcom,smp2p-map-ipa-1-in";
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};
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ipa_smmu_ap: ipa_smmu_ap {
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compatible = "qcom,ipa-smmu-ap-cb";
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iommus = <&apps_smmu 0x720>;
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qcom,iova-mapping = <0x20000000 0x40000000>;
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qcom,additional-mapping =
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/* modem tables in IMEM */
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<0x146bd000 0x146bd000 0x2000>;
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};
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ipa_smmu_wlan: ipa_smmu_wlan {
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compatible = "qcom,ipa-smmu-wlan-cb";
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iommus = <&apps_smmu 0x721>;
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qcom,additional-mapping =
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/* ipa-uc ram */
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<0x1e60000 0x1e60000 0x80000>;
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};
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ipa_smmu_uc: ipa_smmu_uc {
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compatible = "qcom,ipa-smmu-uc-cb";
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iommus = <&apps_smmu 0x722>;
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qcom,iova-mapping = <0x40000000 0x20000000>;
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};
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ipa_smmu_11ad: ipa_smmu_11ad {
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compatible = "qcom,ipa-smmu-11ad-cb";
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iommus = <&apps_smmu 0x5C3 0x0>;
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dma-coherent;
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qcom,shared-cb;
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qcom,iommu-group = <&wil6210_pci_iommu_group>;
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};
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};
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28
bindings/ipa_mpm.yaml
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28
bindings/ipa_mpm.yaml
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@@ -0,0 +1,28 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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title: Qualcomm Technologies, Inc. IPA MHI Prime Manager driver module
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description:
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This module enables IPA Modem to IPA APQ communication using
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MHI Prime.
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Required properties:
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- compatible: Must be "qcom,ipa-mpm"
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- qcom,mhi-chdb-base: MHI channel doorbell base address in MMIO space.
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- qcom,mhi-erdb-base: MHI event doorbell base address in MMIO space.
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Optional:
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- qcom,iova-mapping: Start address and size of the carved IOVA space
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dedicated for MHI control structures
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(such as transfer rings, event rings, doorbells).
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If not present, SMMU S1 is considered to be in bypass mode.
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Example:
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ipa_mpm: qcom,ipa-mpm {
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compatible = "qcom,ipa-mpm";
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qcom,mhi-chdb-base = <0x40300300>;
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qcom,mhi-erdb-base = <0x40300700>;
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qcom,iova-mapping = <0x10000000 0x1FFFFFFF>;
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}
|
20
bindings/msm_gsi.yaml
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20
bindings/msm_gsi.yaml
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@@ -0,0 +1,20 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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title: Qualcomm Technologies, Inc. GSI driver module
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description:
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GSI is a HW accelerator that supports Generic SW Interfaces (GSI) which are
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peripheral specific (IPA in this case).
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GSI translates SW transfer elements (TRE) into TLV transactions which are
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then processed by the peripheral.
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This Driver configures and communicates with GSI HW.
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Required properties:
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- compatible: Must be "qcom,msm_gsi"
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||||
Example:
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qcom,msm-gsi {
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compatible = "qcom,msm_gsi";
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}
|
27
bindings/rmnet_ipa3.yaml
Normal file
27
bindings/rmnet_ipa3.yaml
Normal file
@@ -0,0 +1,27 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
|
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title: Qualcomm Technologies, Inc. RmNet IPA driver module
|
||||
|
||||
description:
|
||||
This module enables embedded data calls using IPA v3 HW.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "qcom,rmnet-ipa3"
|
||||
|
||||
Optional:
|
||||
- qcom,rmnet-ipa-ssr: determine if modem SSR is supported
|
||||
- qcom,ipa-platform-type-msm: indicates the platform type is msm or not
|
||||
- qcom,ipa-advertise-sg-support: determine how to respond to a query
|
||||
regarding scatter-gather capability
|
||||
- qcom,ipa-napi-enable: Boolean context flag to indicate whether
|
||||
to enable napi framework or not
|
||||
- qcom,wan-rx-desc-size: size of WAN rx desc fifo ring, default is 256
|
||||
|
||||
Example:
|
||||
qcom,rmnet-ipa3 {
|
||||
compatible = "qcom,rmnet-ipa3";
|
||||
qcom,wan-rx-desc-size = <256>;
|
||||
}
|
||||
|
Reference in New Issue
Block a user