samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ARM: dts: msm: enable display on tuna platforms

Browse Source 
Enable display on tuna platforms.

Change-Id: I039ff6c32febd7b2afebfaa24a921186b5a46f2c
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
This commit is contained in:
Abhinav Saurabh
2024-09-17 10:28:08 +05:30
parent 722ce2c3d0
commit a0472afd5f
16 changed files with 2011 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
Kbuild
View File

@@ -30,6 +30,17 @@ dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \
display/trustedvm-sun-sde-display-qrd-overlay.dtbo
endif
ifneq ($(CONFIG_ARCH_QTI_VM), y)
dtbo-$(CONFIG_ARCH_TUNA) += display/tuna-sde.dtbo \
display/tuna-sde-display-atp-overlay.dtbo \
display/tuna-sde-display-cdp-overlay.dtbo \
display/tuna-sde-display-mtp-overlay.dtbo \
display/tuna-sde-display-mtp-kiwi-overlay.dtbo \
display/tuna-sde-display-qrd-overlay.dtbo \
display/tuna-sde-display-rumi-overlay.dtbo \
display/tuna-sde-display-rcm-overlay.dtbo
endif
always-y := $(dtb-y) $(dtbo-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

17
display/tuna-sde-display-atp-overlay.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna ATP";
compatible = "qcom,tuna-atp", "qcom,tuna", "qcom,tunap-atp", "qcom,tunap",
"qcom,atp";
qcom,msm-id = <681 0x10000>, <655 0x10000>;
qcom,board-id = <33 0>;
};

17
display/tuna-sde-display-cdp-overlay.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna CDP";
compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,tunap-cdp", "qcom,tunap",
"qcom,cdp";
qcom,msm-id = <681 0x10000>, <655 0x10000>;
qcom,board-id = <1 0>;
};

192
display/tuna-sde-display-cdp.dtsi Normal file
View File

@@ -0,0 +1,192 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "tuna-sde-display.dtsi"
&dsi_nt37801_amoled_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_dsc_10b_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_dsc_10b_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_cmd_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_vid_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_qsync_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_qsync_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_fhd_plus_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_cmd_ddicspr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_video_ddicspr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_sim_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_vid {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_dsc_375_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_dsc_10b_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_dual_sim_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,bl-dsc-cmd-state = "dsi_lp_mode";
};
&dsi_dual_sim_dsc_375_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_sec_hd_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <1023>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd>;
};

1043
display/tuna-sde-display-common.dtsi Normal file
View File

File diff suppressed because it is too large Load Diff

17
display/tuna-sde-display-mtp-kiwi-overlay.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-mtp-kiwi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN";
compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
"qcom,mtp";
qcom,msm-id = <681 0x10000>, <655 0x10000>;
qcom,board-id = <8 2>;
};

6
display/tuna-sde-display-mtp-kiwi.dtsi Normal file
View File

@@ -0,0 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "tuna-sde-display-mtp.dtsi"

17
display/tuna-sde-display-mtp-overlay.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna MTP";
compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap",
"qcom,mtp";
qcom,msm-id = <681 0x10000>, <655 0x10000>;
qcom,board-id = <8 0>, <8 1>;
};

186
display/tuna-sde-display-mtp.dtsi Normal file
View File

@@ -0,0 +1,186 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "tuna-sde-display.dtsi"
&dsi_nt37801_amoled_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_dsc_10b_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_dsc_10b_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_cmd_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_vid_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_qsync_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_qsync_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_fhd_plus_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_cmd_ddicspr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_video_ddicspr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_sim_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_vid {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_dsc_375_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_dsc_10b_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_dual_sim_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,bl-dsc-cmd-state = "dsi_lp_mode";
};
&dsi_dual_sim_dsc_375_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_sec_hd_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <1023>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd>;
};

114
display/tuna-sde-display-pinctrl.dtsi Normal file
View File

@@ -0,0 +1,114 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&tlmm {
pmx_sde: pmx_sde {
sde_dsi_active: sde_dsi_active {
mux {
pins = "gpio14";
function = "gpio";
};
config {
pins = "gpio14";
drive-strength = <8>; /* 8 mA */
bias-disable = <0>; /* no pull */
};
};
sde_dsi_suspend: sde_dsi_suspend {
mux {
pins = "gpio14";
function = "gpio";
};
config {
pins = "gpio14";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* PULL DOWN */
};
};
sde_dsi1_active: sde_dsi1_active {
mux {
pins = "gpio126";
function = "gpio";
};
config {
pins = "gpio126";
drive-strength = <8>; /* 8 mA */
bias-disable = <0>; /* no pull */
};
};
sde_dsi1_suspend: sde_dsi1_suspend {
mux {
pins = "gpio126";
function = "gpio";
};
config {
pins = "gpio126";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* PULL DOWN */
};
};
};
pmx_sde_te: pmx_sde_te {
sde_te_active: sde_te_active {
mux {
pins = "gpio77";
function = "mdp_vsync_p";
};
config {
pins = "gpio77";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* PULL DOWN */
};
};
sde_te_suspend: sde_te_suspend {
mux {
pins = "gpio77";
function = "mdp_vsync_p";
};
config {
pins = "gpio77";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* PULL DOWN */
};
};
sde_te1_active: sde_te1_active {
mux {
pins = "gpio78";
function = "mdp_vsync_s";
};
config {
pins = "gpio78";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* PULL DOWN */
};
};
sde_te1_suspend: sde_te1_suspend {
mux {
pins = "gpio78";
function = "mdp_vsync_s";
};
config {
pins = "gpio78";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* PULL DOWN */
};
};
};
};

17
display/tuna-sde-display-qrd-overlay.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna QRD";
compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,tunap-qrd", "qcom,tunap",
"qcom,qrd";
qcom,msm-id = <681 0x10000>, <655 0x10000>;
qcom,board-id = <11 0>;
};

126
display/tuna-sde-display-qrd.dtsi Normal file
View File

@@ -0,0 +1,126 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "tuna-sde-display.dtsi"
&dsi_nt37801_amoled_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_cmd_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_video_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_qsync_cmd_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_nt37801_amoled_qsync_video_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 14 0>;
qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
};
&dsi_sim_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_vid {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_dsc_375_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_dsc_10b_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_dual_sim_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,bl-dsc-cmd-state = "dsi_lp_mode";
};
&dsi_dual_sim_dsc_375_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
};
&dsi_sim_sec_hd_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <1023>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd_cphy>;
};

17
display/tuna-sde-display-rcm-overlay.dts Normal file
View File

@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna RCM";
compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap",
"qcom,rcm";
qcom,msm-id = <681 0x10000>, <655 0x10000>;
qcom,board-id = <21 0>, <21 1>;
};

16
display/tuna-sde-display-rumi-overlay.dts Normal file
View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-sde-display-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna RUMI";
compatible = "qcom,tuna-rumi", "qcom,tuna", "qcom,rumi";
qcom,msm-id = <655 0x10000>;
qcom,board-id = <15 0>;
};

11
display/tuna-sde-display-rumi.dtsi Normal file
View File

@@ -0,0 +1,11 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "tuna-sde-display.dtsi"
&mdss_mdp {
qcom,sde-emulated-env;
};

204
display/tuna-sde-display.dtsi Normal file
View File

@@ -0,0 +1,204 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/clock/qcom,dispcc-tuna.h>
#include "tuna-sde-display-common.dtsi"
&soc {
};
&sde_dsi {
clocks = <&mdss_dsi_phy0 0>,
<&mdss_dsi_phy0 1>,
<&mdss_dsi_phy1 0>,
<&mdss_dsi_phy1 1>,
/*
* Currently the dsi clock handles are under the dsi
* controller DT node. As soon as the controller probe
* finishes, the dispcc sync state can get called before
* the dsi_display probe potentially disturbing the clock
* votes for cont_splash use case. Hence we are no longer
* protected by the component model in this case against the
* disp cc sync state getting triggered after the dsi_ctrl
* probe. To protect against this incorrect sync state trigger
* add this dummy MDP clk vote handle to the dsi_display
* DT node. Since the dsi_display driver does not parse
* MDP clock nodes, no actual vote shall be added and this
* change is done just to satisfy sync state requirements.
*/
<&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "pll_byte_clk0", "pll_dsi_clk0",
"pll_byte_clk1", "pll_dsi_clk1",
"mdp_core_clk";
vddio-supply = <&L8B>;
vci-supply = <&L19B>;
vdd-supply = <&L3D>;
};
&sde_dsi1 {
clocks = <&mdss_dsi_phy0 0>,
<&mdss_dsi_phy0 1>,
<&mdss_dsi_phy1 0>,
<&mdss_dsi_phy1 1>,
/*
* Currently the dsi clock handles are under the dsi
* controller DT node. As soon as the controller probe
* finishes, the dispcc sync state can get called before
* the dsi_display probe potentially disturbing the clock
* votes for cont_splash use case. Hence we are no longer
* protected by the component model in this case against the
* disp cc sync state getting triggered after the dsi_ctrl
* probe. To protect against this incorrect sync state trigger
* add this dummy MDP clk vote handle to the dsi_display
* DT node. Since the dsi_display driver does not parse
* MDP clock nodes, no actual vote shall be added and this
* change is done just to satisfy sync state requirements.
*/
<&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "pll_byte_clk0", "pll_dsi_clk0",
"pll_byte_clk1", "pll_dsi_clk1",
"mdp_core_clk";
vddio-supply = <&L8B>;
vci-supply = <&L19B>;
vdd-supply = <&L3D>;
};
&mdss_mdp {
connectors = <&sde_dsi &sde_dsi1>;
};
&dsi_nt37801_amoled_cmd {
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
timing@1 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
timing@2 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
timing@3 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
timing@4 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
};
};
&dsi_nt37801_amoled_cmd_cphy {
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
timing@1 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
timing@2 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
};
};
&dsi_nt37801_amoled_fhd_plus_cmd {
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <540 40 540 40 1080 40>;
};
timing@1 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <540 40 540 40 1080 40>;
};
timing@2 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <540 40 540 40 1080 40>;
};
timing@3 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <540 40 540 40 1080 40>;
};
timing@4 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <540 40 540 40 1080 40>;
};
};
};
&dsi_nt37801_amoled_cmd_spr {
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <720 40 720 40 1440 40>;
};
};
};
&dsi_sim_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-display-timings {
timing@0 { /* WQHD 60FPS cmd vid mode*/
qcom,panel-roi-alignment = <720 40 720 40 720 40>;
qcom,partial-update-enabled = "single_roi";
};
timing@2 { /* FHD 60FPS cmd mode*/
qcom,panel-roi-alignment = <540 20 540 20 540 20>;
qcom,partial-update-enabled = "single_roi";
};
timing@3 { /* HD 60FPS cmd mode*/
qcom,panel-roi-alignment = <360 40 360 40 360 40>;
qcom,partial-update-enabled = "single_roi";
};
};
};
&dsi_sim_dsc_375_cmd {
qcom,ulps-enabled;
};
&dsi_sim_dsc_10b_cmd {
qcom,ulps-enabled;
};
&dsi_dual_sim_cmd {
qcom,ulps-enabled;
};
&dsi_dual_sim_dsc_375_cmd {
qcom,ulps-enabled;
};
&dsi_sim_sec_hd_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,panel-roi-alignment = <720 40 720 40 720 40>;
qcom,partial-update-enabled = "single_roi";
};
};
};