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Merge "ARM: dts: msm: Update Tuna GPU frequency plan"

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QCTECMDR Service
2025-02-07 01:54:53 -08:00
committed by Gerrit - the friendly Code Review server
parent a1c6877f85 31cd596f9b
commit 9f996a9f8e
1 changed files with 127 additions and 36 deletions
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163
gpu/tuna-gpu-pwrlevels.dtsi
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@@ -3,6 +3,18 @@
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/* ACD Control register values */
#define ACD_LEVEL_TURBO_L2 0xa02f5ffd
#define ACD_LEVEL_TURBO_L1 0xa8285ffd
#define ACD_LEVEL_TURBO 0x88295ffd
#define ACD_LEVEL_NOM_L1 0xa8295ffd
#define ACD_LEVEL_NOM 0x882a5ffd
#define ACD_LEVEL_SVS_L2 0x882a5ffd
#define ACD_LEVEL_SVS_L1 0xa82a5ffd
#define ACD_LEVEL_SVS 0xa82c5ffd
#define ACD_LEVEL_LOW_SVS 0xc02c5ffd
#define ACD_LEVEL_LOW_SVS_D1 0xc02c5ffd
&msm_gpu {
/* Power levels */
qcom,gpu-pwrlevel-bins {
@@ -19,106 +31,137 @@
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <8>;
qcom,initial-pwrlevel = <9>;
qcom,speed-bin = <0>;
/* Turbo_L1 */
/* Turbo_L2 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <1150000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L2>;
};
/* Turbo_L1 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <1050000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
};
/* Turbo */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <937000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <10>;
qcom,bus-min = <9>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_TURBO>;
};
/* Nom_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <873000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM_L1>;
};
/* Nom */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <763000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <8>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM>;
};
/* SVS_L2 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <688000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L2>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <644000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L1>;
};
/* SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <510000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
qcom,acd-level = <ACD_LEVEL_SVS>;
};
/* Low_SVS */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <362000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq = <3>;
qcom,bus-min = <1>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
};
/* Low_SVS_D1 */
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-freq = <264000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
qcom,bus-freq = <1>;
qcom,bus-min = <1>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
};
};
@@ -138,6 +181,8 @@
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
};
/* Turbo */
@@ -149,6 +194,8 @@
qcom,bus-freq = <10>;
qcom,bus-min = <9>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_TURBO>;
};
/* Nom_L1 */
@@ -160,6 +207,7 @@
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM_L1>;
};
/* Nom */
@@ -171,6 +219,8 @@
qcom,bus-freq = <8>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM>;
};
/* SVS_L2 */
@@ -182,6 +232,8 @@
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L2>;
};
/* SVS_L1 */
@@ -193,6 +245,8 @@
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L1>;
};
/* SVS */
@@ -204,6 +258,8 @@
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
qcom,acd-level = <ACD_LEVEL_SVS>;
};
/* Low_SVS */
@@ -215,6 +271,8 @@
qcom,bus-freq = <3>;
qcom,bus-min = <1>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
};
/* Low_SVS_D1 */
@@ -226,6 +284,8 @@
qcom,bus-freq = <1>;
qcom,bus-min = <1>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
};
};
@@ -233,106 +293,137 @@
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <8>;
qcom,initial-pwrlevel = <9>;
qcom,speed-bin = <0xf2>;
/* Turbo_L1 */
/* Turbo_L2 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <1150000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L2>;
};
/* Turbo_L1 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <1050000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
};
/* Turbo */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <937000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <10>;
qcom,bus-min = <9>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_TURBO>;
};
/* Nom_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <873000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM_L1>;
};
/* Nom */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <763000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <8>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM>;
};
/* SVS_L2 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <688000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L2>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <644000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L1>;
};
/* SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <510000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
qcom,acd-level = <ACD_LEVEL_SVS>;
};
/* Low_SVS */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <362000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq = <3>;
qcom,bus-min = <1>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
};
/* Low_SVS_D1 */
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-freq = <264000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
qcom,bus-freq = <1>;
qcom,bus-min = <1>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
};
};
};