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ARM: dts: msm: Add upstream compatible iommu-addresses property

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Upstream Linux kernel has added a new devicetree property
"iommu-addresses", to replace "qcom,iommu-dma-addr-pool".
The new property defines the address range the device
cannot use, in contrast to the older property which
defines the address range the device can use.

Change-Id: I73166b20ff8ef0415cfa56e649b4792f03c94cad
CRs-Fixed: 3732156
This commit is contained in:
Namita Nair
2024-02-13 10:53:07 -08:00
committed by Namita Balachandran
parent e480fedcc2
commit 9e58275cdd
1 changed files with 7 additions and 4 deletions
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11
pineapple-kiwi-cnss.dtsi
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@@ -172,20 +172,23 @@
}; };
&pcie0_rp { &pcie0_rp {
#address-cells = <5>;
#size-cells = <0>;
cnss_pci0: cnss_pci0 { cnss_pci0: cnss_pci0 {
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;
qcom,iommu-group = <&cnss_pci_iommu_group0>; qcom,iommu-group = <&cnss_pci_iommu_group0>;
memory-region = <&cnss_wlan_mem>; memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
/* address-cells =3 size-cells=2 from pineapple-pcie.dtsi */
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>,
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
};
cnss_pci_iommu_group0: cnss_pci_iommu_group0 { cnss_pci_iommu_group0: cnss_pci_iommu_group0 {
qcom,iommu-msi-size = <0x1000>; qcom,iommu-msi-size = <0x1000>;
qcom,iommu-dma-addr-pool = <0x98000000 0x18000000>;
qcom,iommu-geometry = <0x98000000 0x18010000>; qcom,iommu-geometry = <0x98000000 0x18010000>;
qcom,iommu-dma = "fastmap"; qcom,iommu-dma = "fastmap";
qcom,iommu-pagetable = "coherent"; qcom,iommu-pagetable = "coherent";