ARM: dts: qcom: Update qup_iommu_region node name

Currently single qup_iommu_region is getting created,
leading to DMA RX inactivate.
So update node name for qup_iommu_region0 and qup_iommu_region1.

Change-Id: Id1355c98a07f912e6275ac3c2fb7504ae9f22f53
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
This commit is contained in:
Swetha Chikkaboraiah
2024-12-12 10:01:17 +05:30
parent 5628eb2d31
commit 9c878c4021
2 changed files with 4 additions and 4 deletions

View File

@@ -19,7 +19,7 @@
* Qup1 5: SE 11 * Qup1 5: SE 11
*/ */
qup_iommu_region0: qup_iommu_region { qup_iommu_region0: qup_iommu_region0 {
iommu-addresses = <&gpi_dma0 0x0 0x100000>, <&gpi_dma0 0x200000 0xffe00000>, iommu-addresses = <&gpi_dma0 0x0 0x100000>, <&gpi_dma0 0x200000 0xffe00000>,
<&qupv3_0 0x0 0x40000000>, <&qupv3_0 0x50000000 0xb0000000>; <&qupv3_0 0x0 0x40000000>, <&qupv3_0 0x50000000 0xb0000000>;
}; };
@@ -325,7 +325,7 @@
}; };
}; };
qup_iommu_region1: qup_iommu_region { qup_iommu_region1: qup_iommu_region1 {
iommu-addresses = <&gpi_dma1 0x0 0x100000>, <&gpi_dma1 0x200000 0xffe00000>, iommu-addresses = <&gpi_dma1 0x0 0x100000>, <&gpi_dma1 0x200000 0xffe00000>,
<&qupv3_1 0x0 0x40000000>, <&qupv3_1 0x50000000 0xb0000000>; <&qupv3_1 0x0 0x40000000>, <&qupv3_1 0x50000000 0xb0000000>;
}; };

View File

@@ -17,7 +17,7 @@
* Qup1 4: SE 9 * Qup1 4: SE 9
*/ */
qup_iommu_region0: qup_iommu_region { qup_iommu_region0: qup_iommu_region0 {
iommu-addresses = <&gpi_dma0 0x0 0x100000>, <&gpi_dma0 0x200000 0xffe00000>, iommu-addresses = <&gpi_dma0 0x0 0x100000>, <&gpi_dma0 0x200000 0xffe00000>,
<&qupv3_0 0x0 0x40000000>, <&qupv3_0 0x50000000 0xb0000000>; <&qupv3_0 0x0 0x40000000>, <&qupv3_0 0x50000000 0xb0000000>;
}; };
@@ -279,7 +279,7 @@
}; };
}; };
qup_iommu_region1: qup_iommu_region { qup_iommu_region1: qup_iommu_region1 {
iommu-addresses = <&gpi_dma1 0x0 0x100000>, <&gpi_dma1 0x200000 0xffe00000>, iommu-addresses = <&gpi_dma1 0x0 0x100000>, <&gpi_dma1 0x200000 0xffe00000>,
<&qupv3_1 0x0 0x40000000>, <&qupv3_1 0x50000000 0xb0000000>; <&qupv3_1 0x0 0x40000000>, <&qupv3_1 0x50000000 0xb0000000>;
}; };