ARM: dts: msm: Correct etr interrupts for kera

Correct etr interrupts for kera.

Change-Id: Id47f2a0765ca43755a19f2627269a6241692262c
Signed-off-by: songchai <quic_songchai@quicinc.com>
This commit is contained in:
songchai
2024-12-26 18:44:01 +08:00
parent 8aff948cde
commit 9c855d6ff7

View File

@@ -4353,7 +4353,7 @@
csr-irqctrl-offset = <0x6c>;
byte-cntr-name = "byte-cntr";
byte-cntr-class-name = "coresight-tmc-etr-stream";
interrupts = <GIC_SPI 738 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 352 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "byte-cntr-irq";
clocks = <&aoss_qmp>;
@@ -4386,7 +4386,7 @@
csr-irqctrl-offset = <0x70>;
byte-cntr-name = "byte-cntr1";
byte-cntr-class-name = "coresight-tmc-etr1-stream";
interrupts = <GIC_SPI 737 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 362 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "byte-cntr-irq";
clocks = <&aoss_qmp>;