diff --git a/alor-kiwi-cnss.dtsi b/alor-kiwi-cnss.dtsi new file mode 100644 index 00000000..5952f7db --- /dev/null +++ b/alor-kiwi-cnss.dtsi @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +&wlan_msa_mem { + status = "disabled"; +}; + +&wpss_mem { + status = "disabled"; +}; + +&wpss_pas { + status = "disabled"; +}; + +&pcie0 { + status = "ok"; +}; + +&tlmm { + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + + cnss_wlan_sw_ctrl: cnss_wlan_sw_ctrl { + mux { + pins = "gpio18"; + function = "wcn_sw_ctrl"; + }; + }; + + cnss_wlan_sw_ctrl_wl_cx: cnss_wlan_sw_ctrl_wl_cx { + mux { + pins = "gpio19"; + function = "wcn_sw"; + }; + }; + }; +}; + +&reserved_memory { + cnss_wlan_mem: cnss_wlan_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x2000000>; + }; +}; + +&soc { + wlan_kiwi: qcom,cnss-kiwi@b0000000 { + compatible = "qcom,cnss-kiwi"; + reg = <0x0 0xb0000000 0x0 0x10000>; + reg-names = "smmu_iova_ipa"; + qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>; + + supported-ids = <0x1107>; + wlan-en-gpio = <&tlmm 16 0>; + qcom,bt-en-gpio = <&pm8550ve_d_gpios 3 0>; + qcom,sw-ctrl-gpio = <&tlmm 18 0>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <18 19>; + pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl", + "sw_ctrl_wl_cx"; + pinctrl-0 = <&cnss_wlan_en_active>; + pinctrl-1 = <&cnss_wlan_en_sleep>; + pinctrl-2 = <&cnss_wlan_sw_ctrl>; + pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>; + qcom,wlan; + qcom,wlan-rc-num = <0>; + qcom,wlan-ramdump-dynamic = <0x780000>; + cnss-enable-self-recovery; + qcom,wlan-cbc-enabled; + use-pm-domain; + qcom,same-dt-multi-dev; + /* For AOP communication, use direct QMP instead of mailbox */ + qcom,qmp = <&aoss_qmp>; + + //TODO REGULATORS VOTING + //TODO BUS-BW + + //TODO PMU-VREG-PDC mapping for ol_cpr + //TODO PDC AOP cmd for hmt + + /* cpu mask used for wlan tx rx interrupt affinity + * + */ + wlan-txrx-intr-cpumask = <0x3 0x30>; + }; +}; + +&pcie_rp { + + cnss_pci0: cnss_pci0 { + reg = <0 0 0 0 0>; + qcom,iommu-group = <&cnss_pci_iommu_group0>; + memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>; + + #address-cells = <2>; + #size-cells = <2>; + + cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { + /* address-cells =3 size-cells=2 from alor-pcie.dtsi */ + iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>, + <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; + }; + + cnss_pci_iommu_group0: cnss_pci_iommu_group0 { + qcom,iommu-msi-size = <0x1000>; + qcom,iommu-geometry = <0x0 0x98000000 0x0 0x18010000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-pagetable = "coherent"; + qcom,iommu-faults = "stall-disable", "HUPCF", + "non-fatal"; + }; + }; +}; diff --git a/alor-wcn7750.dtsi b/alor-wcn7750.dtsi new file mode 100644 index 00000000..410a978c --- /dev/null +++ b/alor-wcn7750.dtsi @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +&tlmm { + icnss_sw_ctrl: icnss_sw_ctrl { + mux { + pins = "gpio18"; + function = "wcn_sw_ctrl"; + }; + }; +}; + +&soc { + qcom,smp2p-wpss { + smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { + qcom,entry-name = "wlan"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_1_out: qcom,smp2p-wlan-1-out { + qcom,entry-name = "wlan"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { + qcom,entry-name = "wlan_soc_wake"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_2_out: qcom,smp2p-wlan-2-out { + qcom,entry-name = "wlan_soc_wake"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_3_out: qcom,smp2p-wlan-3-out { + qcom,entry-name = "wlan_ep_power_save"; + #qcom,smem-state-cells = <1>; + }; + }; + + icnss2_direct_link_iommu_group0: icnss2_direct_link_iommu_group0 { + qcom,iommu-dma-addr-pool = <0x0 0xb0000000 0x0 0x10000000>; + qcom,iommu-geometry = <0x0 0xb0000000 0x0 0x10010000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal"; + }; + + icnss2: qcom,wcn7750 { + compatible = "qcom,wcn7750"; + reg = <0x0 0x17010040 0x0 0x0>, + <0x0 0xc0000000 0x0 0x10000>; + reg-names = "msi_addr", "smmu_iova_ipa"; + qcom,rproc-handle = <&wpss_pas>; + iommus = <&apps_smmu 0x1400 0x1>; + wlan-en-gpio =<35>; + host-sol-gpio =<95>; + dev-sol-gpio =<17>; + sw-ctrl-gpio =<18>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <18>; + pinctrl-names = "sw_ctrl"; + pinctrl-0 = <&icnss_sw_ctrl>; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + qcom,iommu-group = <&icnss2_direct_link_iommu_group0>; + dma-coherent; + pin-ctrl-support; + qcom,fw-prefix; + qcom,wlan; + tsens = "sys-therm-3";//TODO VERIFY from thermal team + wcn-hw-version = "wcn7750"; + qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; + + //TODO REGULATOR VOTING + + qcom,smem-states = <&smp2p_wlan_1_out 0>, + <&smp2p_wlan_2_out 0>, + <&smp2p_wlan_3_out 0>; + qcom,smem-state-names = "wlan-smp2p-out", + "wlan-soc-wake-smp2p-out", + "wlan-ep-powersave-smp2p-out"; + + qcom,qmp = <&aoss_qmp>; + qcom,vreg_ol_cpr ="s2d"; + + //TODO BUS BW + + icnss_cdev_apss: icnss_cdev1 { + #cooling-cells = <2>; + }; + + icnss_cdev_wpss: icnss_cdev2 { + #cooling-cells = <2>; + }; + + qcom,smp2p_map_wlan_1_in { + interrupts-extended = <&smp2p_wlan_1_in 0 0>, + <&smp2p_wlan_1_in 1 0>; + interrupt-names = "qcom,smp2p-force-fatal-error", + "qcom,smp2p-early-crash-ind"; + }; + + qcom,smp2p_map_wlan_2_in { + interrupts-extended = <&smp2p_wlan_2_in 0 0>; + interrupt-names = "qcom,smp2p-soc-wake-ack"; + }; + }; + + wlan_direct_link: qcom,icnss-direct-link { + compatible = "qcom,icnss-direct-link"; + iommus = <&apps_smmu 0x100f 0x0>; + qcom,iommu-group = <&icnss2_direct_link_iommu_group0>; + dma-coherent; + }; +}; diff --git a/volcano6i-peach-cnss.dts b/volcano6i-peach-cnss.dts index df9455da..8f411b4a 100644 --- a/volcano6i-peach-cnss.dts +++ b/volcano6i-peach-cnss.dts @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -15,5 +15,5 @@ "qcom,volcanop", "qcom,idp", "qcom,volcano-mtp", "qcom,volcanop-mtp", "qcom,mtp"; qcom,msm-id = <0x4000291 0x10000>, <0x8000291 0x10000>, <0xc000291 0x10000>, <0x10000291 0x10000>, <0x4000292 0x10000>, <0x8000292 0x10000>, <0xc000292 0x10000>, <0x10000292 0x10000>; - qcom,board-id = <8 2>, <8 3>, <8 4>, <8 5>, <8 6>, <34 2>, <34 3>; + qcom,board-id = <8 2>, <8 3>, <8 4>, <8 5>, <8 6>, <34 2>, <34 3>, <8 11>; };