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ARM: dts: msm: Unstub and enable interconnect driver for Sun

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Enable apps_rsc nodes for bcm voter, enable interconnect
driver for Sun.

Change-Id: I26b3348fddcfc2ef2d5ccd7bf77de4bb576f79b5
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
This commit is contained in:
Xubin Bai
2023-07-25 02:53:00 -07:00
parent 3885be950a
commit 9783c2f25a
1 changed files with 69 additions and 14 deletions
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83
qcom/sun.dtsi
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@@ -15,6 +15,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,sun.h> #include <dt-bindings/interconnect/qcom,sun.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/interconnect/qcom,icc.h>
/ { / {
model = "Qualcomm Technologies, Inc. Sun"; model = "Qualcomm Technologies, Inc. Sun";
@@ -315,86 +316,137 @@
clk_virt: interconnect@0 { clk_virt: interconnect@0 {
compatible = "qcom,sun-clk_virt"; compatible = "qcom,sun-clk_virt";
qcom,stub;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,disabled-voters = "pcie_crm_hw_0", "pcie_crm_hw_1";
}; };
mc_virt: interconnect@1 { mc_virt: interconnect@1 {
compatible = "qcom,sun-mc_virt"; compatible = "qcom,sun-mc_virt";
qcom,stub;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,disabled-voters = "disp",
"cam_ife_0",
"cam_ife_1",
"cam_ife_2",
"pcie_crm_hw_0",
"pcie_crm_hw_1";
}; };
config_noc: interconnect@1600000 { config_noc: interconnect@1600000 {
compatible = "qcom,sun-cnoc_cfg"; compatible = "qcom,sun-cnoc_cfg";
qcom,stub; reg = <0x1600000 0x6200>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
cnoc_main: interconnect@1500000 { cnoc_main: interconnect@1500000 {
compatible = "qcom,sun-cnoc_main"; compatible = "qcom,sun-cnoc_main";
qcom,stub; reg = <0x1500000 0x16080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
system_noc: interconnect@1680000 { system_noc: interconnect@1680000 {
compatible = "qcom,sun-system_noc"; compatible = "qcom,sun-system_noc";
qcom,stub; reg = <0x1680000 0x1d080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
pcie_noc: interconnect@16c0000 { pcie_noc: interconnect@16c0000 {
compatible = "qcom,sun-pcie_anoc"; compatible = "qcom,sun-pcie_anoc";
qcom,stub; reg = <0x16c0000 0x11400>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
clocks = <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>,
<&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,disabled-voters = "pcie_crm_hw_0", "pcie_crm_hw_1";
qcom,skip-qos;
}; };
aggre1_noc: interconnect@16e0000 { aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sun-aggre1_noc"; compatible = "qcom,sun-aggre1_noc";
qcom,stub; reg = <0x16e0000 0x16400>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,skip-qos;
}; };
aggre2_noc: interconnect@1700000 { aggre2_noc: interconnect@1700000 {
compatible = "qcom,sun-aggre2_noc"; compatible = "qcom,sun-aggre2_noc";
qcom,stub; reg = <0x1700000 0x1f400>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&rpmhcc RPMH_IPA_CLK>;
qcom,skip-qos;
}; };
mmss_noc: interconnect@1780000 { mmss_noc: interconnect@1780000 {
compatible = "qcom,sun-mmss_noc"; compatible = "qcom,sun-mmss_noc";
qcom,stub; reg = <0x1780000 0x5b800>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,disabled-voters = "disp", "cam_ife_0", "cam_ife_1", "cam_ife_2";
qcom,skip-qos;
}; };
gem_noc: interconnect@24100000 { gem_noc: interconnect@24100000 {
compatible = "qcom,sun-gem_noc"; compatible = "qcom,sun-gem_noc";
qcom,stub; reg = <0x24100000 0x14b080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
qcom,disabled-voters = "disp",
"cam_ife_0",
"cam_ife_1",
"cam_ife_2",
"pcie_crm_hw_0",
"pcie_crm_hw_1";
qcom,skip-qos;
}; };
nsp_noc: interconnect@320c0000 { nsp_noc: interconnect@320c0000 {
compatible = "qcom,sun-nsp_noc"; compatible = "qcom,sun-nsp_noc";
qcom,stub; reg = <0x320c0000 0x13080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
lpass_ag_noc: interconnect@7e40000 { lpass_ag_noc: interconnect@7e40000 {
compatible = "qcom,sun-lpass_ag_noc"; compatible = "qcom,sun-lpass_ag_noc";
qcom,stub; reg = <0x7e40000 0xe080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
lpass_lpiaon_noc: interconnect@7400000 { lpass_lpiaon_noc: interconnect@7400000 {
compatible = "qcom,sun-lpass_lpiaon_noc"; compatible = "qcom,sun-lpass_lpiaon_noc";
qcom,stub; reg = <0x7400000 0x19080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
lpass_lpicx_noc: interconnect@7420000 { lpass_lpicx_noc: interconnect@7420000 {
compatible = "qcom,sun-lpass_lpicx_noc"; compatible = "qcom,sun-lpass_lpicx_noc";
qcom,stub; reg = <0x7420000 0x44080>;
#interconnect-cells = <1>; #interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
}; };
apps_rsc: rsc@16500000 { apps_rsc: rsc@16500000 {
@@ -419,6 +471,9 @@
<CONTROL_TCS 0>, <CONTROL_TCS 0>,
<FAST_PATH_TCS 1>; <FAST_PATH_TCS 1>;
}; };
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
}; };
}; };