From 960b39e2cc779ad3bb18b8e8d136b6d8695498df Mon Sep 17 00:00:00 2001 From: Paras Sharma Date: Tue, 22 Oct 2024 17:52:13 +0530 Subject: [PATCH] ARM: dts: msm: Add the "gcc_cfg_noc_pcie_anoc_ahb_clk" clock for tuna Add the "gcc_cfg_noc_pcie_anoc_ahb_clk" clock for tuna. Change-Id: Ib023883dc4aac18e024aa8f0250de7aa5ad2b91a Signed-off-by: Paras Sharma --- qcom/tuna-pcie.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/qcom/tuna-pcie.dtsi b/qcom/tuna-pcie.dtsi index b0972852..d50e57d9 100644 --- a/qcom/tuna-pcie.dtsi +++ b/qcom/tuna-pcie.dtsi @@ -94,6 +94,7 @@ <&gcc GCC_DDRSS_PCIE_SF_QTB_CLK>, <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>, <&gcc GCC_CNOC_PCIE_SF_AXI_CLK>, + <&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>, <&gcc GCC_PCIE_0_PIPE_DIV2_CLK>, <&gcc GCC_PCIE_0_PIPE_CLK_SRC>, <&pcie_0_pipe_clk>; @@ -104,13 +105,13 @@ "pcie_rate_change_clk", "gcc_ddrss_pcie_sf_qtb_clk", "pcie_aggre_noc_axi_clk", - "gcc_cnoc_pcie_sf_axi_clk", "pcie_0_pipe_div2_clk", - "pcie_pipe_clk_mux", + "gcc_cnoc_pcie_sf_axi_clk", "pcie_cfg_noc_pcie_anoc_ahb_clk", + "pcie_0_pipe_div2_clk", "pcie_pipe_clk_mux", "pcie_pipe_clk_ext_src"; clock-frequency = <0>, <0>, <19200000>, <0>, <0>, <0>, <0>, <0>, - <100000000>, <0>, <0>, <0>, <0>, <0>, <0>; + <100000000>, <0>, <0>, <0>, <0>, <0>, <0>, <0>; clock-suppressible = <0>, <0>, <0>, <0>, <0>, <0>, <1>, <0>, - <0>, <0>, <0>, <1>, <0>, <0>, <0>; + <0>, <0>, <0>, <1>, <0>, <0>, <0>, <0>; resets = <&gcc GCC_PCIE_0_BCR>, <&gcc GCC_PCIE_0_PHY_BCR>;