diff --git a/Kbuild b/Kbuild index c145349b..08eef20b 100644 --- a/Kbuild +++ b/Kbuild @@ -5,6 +5,11 @@ dtbo-y += sun-peach-cnss.dtbo dtbo-y += sun-peach-cnss-v8.dtbo endif +ifeq ($(CONFIG_ARCH_PINEAPPLE),y) +dtbo-y += pineapple-kiwi-cnss.dtbo +dtbo-y += pineapplep-hdk-kiwi-cnss.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/pineapple-kiwi-cnss.dts b/pineapple-kiwi-cnss.dts new file mode 100644 index 00000000..3cd0355a --- /dev/null +++ b/pineapple-kiwi-cnss.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapple-kiwi-cnss.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Pineapple SoCs"; + compatible = "qcom,pineapple", "qcom,pineapplep"; + qcom,msm-id = <557 0x10000>, <577 0x10000>, <557 0x20000>, <577 0x20000>; + qcom,board-id = <1 0>, <8 0>, <11 0>, <0x15 0>, <0x1000B 0>, <0x10021 0>, <0x50001 0>, <0x50008 0>, <0x5000B 0>; +}; diff --git a/pineapple-kiwi-cnss.dtsi b/pineapple-kiwi-cnss.dtsi new file mode 100644 index 00000000..33e0ac1f --- /dev/null +++ b/pineapple-kiwi-cnss.dtsi @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +&tlmm { + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + }; +}; + +&reserved_memory { + cnss_wlan_mem: cnss_wlan_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x2000000>; + }; +}; + +&soc { + wlan_kiwi: qcom,cnss-kiwi@b0000000 { + compatible = "qcom,cnss-kiwi"; + reg = <0xb0000000 0x10000>; + reg-names = "smmu_iova_ipa"; + qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>; + + supported-ids = <0x1107>; + wlan-en-gpio = <&tlmm 16 0>; + qcom,bt-en-gpio = <&tlmm 17 0>; + qcom,sw-ctrl-gpio = <&tlmm 18 0>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <18 19>; + pinctrl-names = "wlan_en_active", "wlan_en_sleep"; + pinctrl-0 = <&cnss_wlan_en_active>; + pinctrl-1 = <&cnss_wlan_en_sleep>; + qcom,wlan; + qcom,wlan-rc-num = <0>; + qcom,wlan-ramdump-dynamic = <0x780000>; + qcom,wlan-cbc-enabled; + cnss-enable-self-recovery; + use-pm-domain; + qcom,same-dt-multi-dev; + /* For AOP communication, use direct QMP instead of mailbox */ + qcom,qmp = <&aoss_qmp>; + + vdd-wlan-io-supply = <&L15B>; + qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>; + vdd-wlan-io12-supply = <&L3C>; + qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>; + vdd-wlan-supply = <&S4I>; + qcom,vdd-wlan-config = <940000 940000 0 0 1>; + vdd-wlan-aon-supply = <&S2C>; + qcom,vdd-wlan-aon-config = <976000 976000 0 0 1>; + vdd-wlan-dig-supply = <&S3C>; + qcom,vdd-wlan-dig-config = <916000 916000 0 0 1>; + vdd-wlan-rfa1-supply = <&S6C>; + qcom,vdd-wlan-rfa1-config = <1864000 1864000 0 0 1>; + vdd-wlan-rfa2-supply = <&S1C>; + qcom,vdd-wlan-rfa2-config = <1316000 1316000 0 0 1>; + vdd-wlan-ant-share-supply = <&L6K>; + qcom,vdd-wlan-ant-share-config = <1800000 1800000 0 0 1>; + + interconnects = + <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, + <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; + + qcom,icc-path-count = <2>; + qcom,bus-bw-cfg-count = <9>; + qcom,bus-bw-cfg = + /** ICC Path 1 **/ + <0 0>, /* no vote */ + /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ + <2250 1600000>, + /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ + <7500 1600000>, + /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ + <30000 1600000>, + /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ + <100000 1600000>, + /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ + <175000 6448000>, + /* ultra high: DBS mode snoc/anoc: 403 Mhz */ + <312500 6448000>, + /* super high: DBS mode snoc/anoc: 533 Mhz */ + <587500 8528000>, + /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ + <7500 3200000>, + + /** ICC Path 2 **/ + <0 0>, + /* idle: 0-18 Mbps ddr: 547.2 MHz */ + <2250 2188800>, + /* low: 18-60 Mbps ddr: 547.2 MHz */ + <7500 2188800>, + /* medium: 60-240 Mbps ddr: 547.2 MHz */ + <30000 2188800>, + /* high: 240-1200 Mbps ddr: 547.2 MHz */ + <100000 2188800>, + /* very high: > 1200 Mbps ddr: 1555 MHz */ + <175000 6220800>, + /* ultra high: DBS mode ddr: 2092 MHz */ + <312500 8368000>, + /* super high: DBS mode ddr: 3.2 GHz */ + <587500 12800000>, + /* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */ + <7500 2188800>; + + qcom,vreg_pdc_map = + "s3c", "rf", + "l15B", "rf", + "l3c", "rf", + "s1c", "rf", + "s6c", "rf", + "s2c", "bb", + "s4i", "bb"; + + qcom,pmu_vreg_map = + "VDD095_MX_PMU", "s2c", + "VDD095_PMU", "s4i", + "VDD_PMU_AON_I", "s3c", + "VDD095_PMU_BT", "s3c", + "VDD09_PMU_RFA_I", "s3c", + "VDD13_PMU_PCIE_I", "s1c", + "VDD13_PMU_RFA_I", "s1c", + "VDD19_PMU_PCIE_I", "s6c", + "VDD19_PMU_RFA_I", "s6c"; + + qcom,pdc_init_table = + "{class: wlan_pdc, ss: rf, res: s3c.v, upval: 916}", + "{class: wlan_pdc, ss: rf, res: s3c.v, dwnval: 612}", + "{class: wlan_pdc, ss: rf, res: s1c.v, upval: 1316}", + "{class: wlan_pdc, ss: rf, res: s1c.v, dwnval: 944}", + "{class: wlan_pdc, ss: rf, res: s6c.v, upval: 1864}", + "{class: wlan_pdc, ss: rf, res: s6c.v, dwnval: 1820}", + "{class: wlan_pdc, ss: bb, res: s2c.v, upval: 976}", + "{class: wlan_pdc, ss: bb, res: s2c.v, dwnval: 512}", + "{class: wlan_pdc, ss: bb, res: s4i.v, upval: 940}", + "{class: wlan_pdc, ss: bb, res: s4i.v, dwnval: 420}"; + }; +}; + +&pcie0_rp { + #address-cells = <5>; + #size-cells = <0>; + + cnss_pci0: cnss_pci0 { + reg = <0 0 0 0 0>; + qcom,iommu-group = <&cnss_pci_iommu_group0>; + memory-region = <&cnss_wlan_mem>; + + #address-cells = <1>; + #size-cells = <1>; + + cnss_pci_iommu_group0: cnss_pci_iommu_group0 { + qcom,iommu-msi-size = <0x1000>; + qcom,iommu-dma-addr-pool = <0x98000000 0x18000000>; + qcom,iommu-geometry = <0x98000000 0x18010000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-pagetable = "coherent"; + qcom,iommu-faults = "stall-disable", "HUPCF", + "non-fatal"; + }; + }; +}; diff --git a/pineapplep-hdk-kiwi-cnss.dts b/pineapplep-hdk-kiwi-cnss.dts new file mode 100644 index 00000000..f7f5c2ba --- /dev/null +++ b/pineapplep-hdk-kiwi-cnss.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "pineapplep-hdk-kiwi-cnss.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. PineappleP HDK"; + compatible = "qcom,pineapplep-hdk", "qcom,pineapplep", "qcom,hdk"; + qcom,msm-id = <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x1f 0>; +}; diff --git a/pineapplep-hdk-kiwi-cnss.dtsi b/pineapplep-hdk-kiwi-cnss.dtsi new file mode 100644 index 00000000..b4cd6219 --- /dev/null +++ b/pineapplep-hdk-kiwi-cnss.dtsi @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include + +&tlmm { + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + }; +}; + +&reserved_memory { + cnss_wlan_mem: cnss_wlan_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x2000000>; + }; +}; + +&soc { + wlan_kiwi: qcom,cnss-kiwi@b0000000 { + compatible = "qcom,cnss-kiwi"; + reg = <0xb0000000 0x10000>; + reg-names = "smmu_iova_ipa"; + qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>; + + supported-ids = <0x1107>; + wlan-en-gpio = <&tlmm 16 0>; + qcom,bt-en-gpio = <&tlmm 17 0>; + qcom,sw-ctrl-gpio = <&tlmm 18 0>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <18 19>; + pinctrl-names = "wlan_en_active", "wlan_en_sleep"; + pinctrl-0 = <&cnss_wlan_en_active>; + pinctrl-1 = <&cnss_wlan_en_sleep>; + qcom,wlan; + qcom,wlan-rc-num = <0>; + qcom,wlan-ramdump-dynamic = <0x780000>; + qcom,wlan-cbc-enabled; + cnss-enable-self-recovery; + use-pm-domain; + qcom,same-dt-multi-dev; + /* For AOP communication, use direct QMP instead of mailbox */ + qcom,qmp = <&aoss_qmp>; + + vdd-wlan-io-supply = <&L15B>; + qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>; + vdd-wlan-io12-supply = <&L3C>; + qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>; + vdd-wlan-supply = <&S4I>; + qcom,vdd-wlan-config = <940000 940000 0 0 1>; + vdd-wlan-aon-supply = <&S2C>; + qcom,vdd-wlan-aon-config = <976000 976000 0 0 1>; + vdd-wlan-dig-supply = <&S3C>; + qcom,vdd-wlan-dig-config = <916000 916000 0 0 1>; + vdd-wlan-rfa1-supply = <&S6C>; + qcom,vdd-wlan-rfa1-config = <1864000 1864000 0 0 1>; + vdd-wlan-rfa2-supply = <&S1C>; + qcom,vdd-wlan-rfa2-config = <1316000 1316000 0 0 1>; + + interconnects = + <&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>, + <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; + + qcom,icc-path-count = <2>; + qcom,bus-bw-cfg-count = <9>; + qcom,bus-bw-cfg = + /** ICC Path 1 **/ + <0 0>, /* no vote */ + /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ + <2250 1600000>, + /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ + <7500 1600000>, + /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ + <30000 1600000>, + /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ + <100000 1600000>, + /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ + <175000 6448000>, + /* ultra high: DBS mode snoc/anoc: 403 Mhz */ + <312500 6448000>, + /* super high: DBS mode snoc/anoc: 533 Mhz */ + <587500 8528000>, + /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ + <7500 3200000>, + + /** ICC Path 2 **/ + <0 0>, + /* idle: 0-18 Mbps ddr: 547.2 MHz */ + <2250 2188800>, + /* low: 18-60 Mbps ddr: 547.2 MHz */ + <7500 2188800>, + /* medium: 60-240 Mbps ddr: 547.2 MHz */ + <30000 2188800>, + /* high: 240-1200 Mbps ddr: 547.2 MHz */ + <100000 2188800>, + /* very high: > 1200 Mbps ddr: 1555 MHz */ + <175000 6220800>, + /* ultra high: DBS mode ddr: 2092 MHz */ + <312500 8368000>, + /* super high: DBS mode ddr: 3.2 GHz */ + <587500 12800000>, + /* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */ + <7500 2188800>; + + qcom,vreg_pdc_map = + "s3c", "rf", + "l15B", "rf", + "l3c", "rf", + "s1c", "rf", + "s6c", "rf", + "s2c", "bb", + "s4i", "bb"; + + qcom,pmu_vreg_map = + "VDD095_MX_PMU", "s2c", + "VDD095_PMU", "s4i", + "VDD_PMU_AON_I", "s3c", + "VDD095_PMU_BT", "s3c", + "VDD09_PMU_RFA_I", "s3c", + "VDD13_PMU_PCIE_I", "s1c", + "VDD13_PMU_RFA_I", "s1c", + "VDD19_PMU_PCIE_I", "s6c", + "VDD19_PMU_RFA_I", "s6c"; + + qcom,pdc_init_table = + "{class: wlan_pdc, ss: rf, res: s3c.v, upval: 916}", + "{class: wlan_pdc, ss: rf, res: s3c.v, dwnval: 612}", + "{class: wlan_pdc, ss: rf, res: s1c.v, upval: 1316}", + "{class: wlan_pdc, ss: rf, res: s1c.v, dwnval: 944}", + "{class: wlan_pdc, ss: rf, res: s6c.v, upval: 1864}", + "{class: wlan_pdc, ss: rf, res: s6c.v, dwnval: 1820}", + "{class: wlan_pdc, ss: bb, res: s2c.v, upval: 976}", + "{class: wlan_pdc, ss: bb, res: s2c.v, dwnval: 512}", + "{class: wlan_pdc, ss: bb, res: s4i.v, upval: 940}", + "{class: wlan_pdc, ss: bb, res: s4i.v, dwnval: 420}"; + }; +}; + +&pcie0_rp { + #address-cells = <5>; + #size-cells = <0>; + + cnss_pci0: cnss_pci0 { + reg = <0 0 0 0 0>; + qcom,iommu-group = <&cnss_pci_iommu_group0>; + memory-region = <&cnss_wlan_mem>; + + #address-cells = <1>; + #size-cells = <1>; + + cnss_pci_iommu_group0: cnss_pci_iommu_group0 { + qcom,iommu-msi-size = <0x1000>; + qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>; + qcom,iommu-geometry = <0xa0000000 0x10010000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-pagetable = "coherent"; + qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE", + "non-fatal"; + }; + }; +};