diff --git a/qcom/sun-rumi.dtsi b/qcom/sun-rumi.dtsi index e95a486c..5dceb2e8 100644 --- a/qcom/sun-rumi.dtsi +++ b/qcom/sun-rumi.dtsi @@ -224,3 +224,15 @@ regulator-always-on; regulator-min-microvolt = ; }; + +&bwmon_ddr { + qcom,hw-timer-hz = <192000>; +}; + +&bwmon_llcc_gold { + qcom,hw-timer-hz = <192000>; +}; + +&bwmon_llcc_prime { + qcom,hw-timer-hz = <192000>; +}; diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index 59d50cf5..0ef89700 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -819,6 +819,12 @@ compatible = "qcom,sun-rpmh-clk"; #clock-cells = <1>; }; + + dcvs_fp: qcom,dcvs-fp { + compatible = "qcom,dcvs-fp"; + qcom,ddr-bcm-name = "MC4"; + qcom,llcc-bcm-name = "SH5"; + }; }; }; @@ -1940,6 +1946,275 @@ reg = <0x81210000 0x10000>, <0x81220000 0x10000>; mboxes = <&cpucp 1>; }; + + llcc_pmu: llcc-pmu@24095000 { + compatible = "qcom,llcc-pmu-ver2"; + reg = <0x24095000 0x300>; + reg-names = "lagg-base"; + }; + + qcom_pmu: qcom,pmu { + compatible = "qcom,pmu"; + qcom,long-counter; + qcom,pmu-events-tbl = + < 0x0008 0xFF 0x02 0x02 >, + < 0x0011 0xFF 0x01 0x00 >, + < 0x0017 0xFF 0xFF 0x04 >, + < 0x1000 0xFF 0xFF 0x08 >; + }; + + ddr_freq_table: ddr-freq-table { + qcom,freq-tbl = + < 547000 >, + < 1353000 >, + < 1555000 >, + < 1708000 >, + < 2092000 >, + < 2736000 >, + < 3187000 >, + < 3686000 >, + < 4224000 >, + < 4761000 >; + }; + + llcc_freq_table: llcc-freq-table { + qcom,freq-tbl = + < 350000 >, + < 533000 >, + < 600000 >, + < 806000 >, + < 933000 >, + < 1066000 >, + < 1211000 >; + }; + + ddrqos_freq_table: ddrqos-freq-table { + qcom,freq-tbl = + < 0 >, + < 1 >; + }; + + qcom_dcvs: qcom,dcvs { + compatible = "qcom,dcvs"; + + qcom_ddr_dcvs_hw: ddr { + compatible = "qcom,dcvs-hw"; + qcom,dcvs-hw-type = <0>; + qcom,bus-width = <4>; + qcom,freq-tbl = <&ddr_freq_table>; + + ddr_dcvs_sp: sp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <0>; + interconnects = <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>; + }; + + ddr_dcvs_fp: fp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <1>; + qcom,fp-voter = <&dcvs_fp>; + }; + }; + + qcom_llcc_dcvs_hw: llcc { + compatible = "qcom,dcvs-hw"; + qcom,dcvs-hw-type = <1>; + qcom,bus-width = <16>; + qcom,freq-tbl = <&llcc_freq_table>; + + llcc_dcvs_sp: sp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <0>; + interconnects = <&gem_noc MASTER_APPSS_PROC + &gem_noc SLAVE_LLCC>; + }; + + llcc_dcvs_fp: fp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <1>; + qcom,fp-voter = <&dcvs_fp>; + }; + }; + + qcom_ddrqos_dcvs_hw: ddrqos { + compatible = "qcom,dcvs-hw"; + qcom,dcvs-hw-type = <3>; + qcom,bus-width = <1>; + qcom,freq-tbl = <&ddrqos_freq_table>; + + ddrqos_dcvs_sp: sp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <0>; + interconnects = <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>; + }; + }; + }; + + qcom_memlat: qcom,memlat { + compatible = "qcom,memlat"; + + ddr { + compatible = "qcom,memlat-grp"; + qcom,target-dev = <&qcom_ddr_dcvs_hw>; + qcom,sampling-path = <&ddr_dcvs_fp>; + qcom,miss-ev = <0x1000>; + + gold { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>; + qcom,cpufreq-memfreq-tbl = + < 690000 547000 >, + < 880000 1353000 >, + < 1330000 1555000 >, + < 1670000 2092000 >, + < 2270000 3187000 >, + < 2580000 3686000 >; + qcom,sampling-enabled; + }; + + prime { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 610000 547000 >, + < 820000 1353000 >, + < 1770000 2092000 >, + < 2180000 3187000 >, + < 2800000 3686000 >, + < 3500000 4224000 >, + < 3980000 4761000 >; + qcom,sampling-enabled; + }; + + gold-compute { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 1970000 547000 >, + < 3980000 2092000 >; + qcom,sampling-enabled; + qcom,compute-mon; + }; + + prime-latfloor { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 2800000 547000 >, + < 3980000 4224000 >; + qcom,sampling-enabled; + }; + }; + + llcc { + compatible = "qcom,memlat-grp"; + qcom,target-dev = <&qcom_llcc_dcvs_hw>; + qcom,sampling-path = <&llcc_dcvs_fp>; + qcom,miss-ev = <0x37>; + + gold { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5>; + qcom,cpufreq-memfreq-tbl = + < 880000 350000 >, + < 1670000 533000 >, + < 2270000 806000 >, + < 2580000 933000 >; + qcom,sampling-enabled; + }; + + prime { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 820000 350000 >, + < 1770000 533000 >, + < 2180000 806000 >, + < 2800000 933000 >, + < 3500000 1066000 >, + < 3980000 1211000 >; + qcom,sampling-enabled; + }; + + gold-compute { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 1970000 350000 >, + < 3980000 533000 >; + qcom,sampling-enabled; + qcom,compute-mon; + }; + }; + + ddrqos { + compatible = "qcom,memlat-grp"; + qcom,target-dev = <&qcom_ddrqos_dcvs_hw>; + qcom,sampling-path = <&ddrqos_dcvs_sp>; + qcom,miss-ev = <0x1000>; + + ddrqos_gold_lat: gold { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4 &CPU5 &CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 1970000 0 >, + < 3980000 1 >; + qcom,sampling-enabled; + }; + + ddrqos_prime_lat: prime { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 1770000 0 >, + < 3980000 1 >; + qcom,sampling-enabled; + }; + + ddrqos_prime_latfloor: prime-latfloor { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 2180000 0 >, + < 3980000 1 >; + qcom,sampling-enabled; + }; + }; + }; + + bwmon_ddr: qcom,bwmon-ddr@24091000 { + compatible = "qcom,bwmon5"; + reg = <0x24091000 0x1000>; + reg-names = "base"; + interrupts = ; + qcom,hw-timer-hz = <19200000>; + qcom,count-unit = <0x10000>; + qcom,target-dev = <&qcom_ddr_dcvs_hw>; + }; + + bwmon_llcc_gold: qcom,bwmon-llcc-gold0x240B3300 { + compatible = "qcom,bwmon4"; + reg = <0x240B3400 0x300>, <0x240B3300 0x200>; + reg-names = "base", "global_base"; + interrupts = ; + qcom,mport = <0>; + qcom,hw-timer-hz = <19200000>; + qcom,count-unit = <0x10000>; + qcom,target-dev = <&qcom_llcc_dcvs_hw>; + }; + + bwmon_llcc_prime: qcom,bwmon-llcc-prime@240B7300 { + compatible = "qcom,bwmon4"; + reg = <0x240B7400 0x300>, <0x240B7300 0x200>; + reg-names = "base", "global_base"; + interrupts = ; + qcom,mport = <0>; + qcom,hw-timer-hz = <19200000>; + qcom,count-unit = <0x10000>; + qcom,target-dev = <&qcom_llcc_dcvs_hw>; + }; }; &reserved_memory {