Merge "dt-bindings: clock: qcom: add VIDEO/EVA clock controller bindings on tuna"
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@@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/qcom,evacc-sun.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. Eva Clock Controller Binding for SUN
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title: Qualcomm Technologies, Inc. Eva Clock Controller for SUN
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maintainers:
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- Xubin Bai <quic_xubibai@quicinc.com>
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@@ -14,10 +14,13 @@ description: |
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See also:
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- dt-bindings/clock/qcom,evacc-sun.h
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- dt-bindings/clock/qcom,evacc-tuna.h
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properties:
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compatible:
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const: qcom,sun-evacc
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enum:
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- qcom,sun-evacc
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- qcom,tuna-evacc
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clocks:
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items:
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@@ -22,6 +22,7 @@ description: |
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dt-bindings/clock/qcom,videocc-pineapple.h
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dt-bindings/clock/qcom,videocc-sun.h
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dt-bindings/clock/qcom,videocc-parrot.h
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dt-bindings/clock/qcom,videocc-tuna.h
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properties:
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compatible:
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@@ -36,6 +37,7 @@ properties:
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- qcom,sun-videocc
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- qcom,sun-videocc-v2
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- qcom,parrot-videocc
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- qcom,tuna-videocc
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clocks:
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items:
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@@ -549,8 +549,25 @@
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};
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gcc: clock-controller@100000 {
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compatible = "qcom,dummycc";
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clock-output-names = "gcc_clocks";
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compatible = "qcom,tuna-gcc", "syscon";
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reg = <0x100000 0x1f4200>;
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reg-name = "cc_base";
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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vdd_mx-supply = <&VDD_MX_LEVEL>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&pcie_0_pipe_clk>,
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<&sleep_clk>,
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<&ufs_phy_rx_symbol_0_clk>,
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<&ufs_phy_rx_symbol_1_clk>,
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<&ufs_phy_tx_symbol_0_clk>,
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<&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
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clock-names = "bi_tcxo",
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"pcie_0_pipe_clk",
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"sleep_clk",
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"ufs_phy_rx_symbol_0_clk",
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"ufs_phy_rx_symbol_1_clk",
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"ufs_phy_tx_symbol_0_clk",
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"usb3_phy_wrapper_gcc_usb30_pipe_clk";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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@@ -562,9 +579,10 @@
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#reset-cells = <1>;
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};
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tcsrcc: clock-controller@f100000 {
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compatible = "qcom,dummycc";
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clock-output-names = "tcsrcc_clocks";
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tcsrcc: clock-controller@1fbf000 {
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compatible = "qcom,tuna-tcsrcc", "syscon";
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reg = <0x1fbf000 0x14>;
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reg-name = "cc_base";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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@@ -631,32 +649,38 @@
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};
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&gcc_pcie_0_gdsc {
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compatible = "regulator-fixed";
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compatible = "qcom,gdsc";
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parent-supply = <&VDD_CX_LEVEL>;
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status = "ok";
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};
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&gcc_pcie_0_phy_gdsc {
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compatible = "regulator-fixed";
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compatible = "qcom,gdsc";
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parent-supply = <&VDD_MX_LEVEL>;
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status = "ok";
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};
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&gcc_ufs_mem_phy_gdsc {
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compatible = "regulator-fixed";
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compatible = "qcom,gdsc";
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parent-supply = <&VDD_MX_LEVEL>;
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status = "ok";
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};
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&gcc_ufs_phy_gdsc {
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compatible = "regulator-fixed";
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compatible = "qcom,gdsc";
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parent-supply = <&VDD_CX_LEVEL>;
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status = "ok";
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};
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&gcc_usb30_prim_gdsc {
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compatible = "regulator-fixed";
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compatible = "qcom,gdsc";
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parent-supply = <&VDD_CX_LEVEL>;
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status = "ok";
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};
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&gcc_usb3_phy_gdsc {
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compatible = "regulator-fixed";
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compatible = "qcom,gdsc";
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parent-supply = <&VDD_MX_LEVEL>;
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status = "ok";
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};
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