From 93bddeaaf317ba9cc49bf89aec85c0ef0a1cb307 Mon Sep 17 00:00:00 2001 From: Patrick Daly Date: Wed, 14 Aug 2024 14:48:22 -0700 Subject: [PATCH] ARM: dts: msm: Add interconnect vote for kgsl-smmu on sun When all clients remove DDR bandwidth vote, DDR may power collapse. As part of its shutdown sequence, it waits for an 'active' signal to no longer be asserted by the gpu cx gdsc. Thus, if SW votes for the gdsc to be active, but not for DDR bandwidth, this sequence may get stuck. Change-Id: I48d704f08cfe6d17159eb04d02f5ed123809f967 Signed-off-by: Patrick Daly --- qcom/msm-arm-smmu-sun.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/qcom/msm-arm-smmu-sun.dtsi b/qcom/msm-arm-smmu-sun.dtsi index 94b24551..4b640146 100644 --- a/qcom/msm-arm-smmu-sun.dtsi +++ b/qcom/msm-arm-smmu-sun.dtsi @@ -17,7 +17,13 @@ ranges; dma-coherent; + /* + * When gdsc is enabled, and cpu enters cpuidle, DDR + * bandwidth vote must be present to prevent DDR + * shutdown. + */ power-domains = <&gpucc GPU_CC_CX_GDSC>; + interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>; clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; clock-names =