From 92c283726a4ebd7689d360a11b72f3951c8c8edb Mon Sep 17 00:00:00 2001 From: chengxue Date: Thu, 2 Nov 2023 15:26:53 -0700 Subject: [PATCH] ARM: dts: msm: Add trustedvm camera item support Add standalone files for trustedvm camera config and dts configuration. CRs-Fixed: 3494729 Change-Id: I96eff41b7555b9b88769860d4d176f927154a78d Signed-off-by: chengxue --- config/pineapple_tuivm.mk | 3 + trustedvm-pineapple-camera-sensor-cdp.dts | 19 + trustedvm-pineapple-camera-sensor-cdp.dtsi | 250 ++ trustedvm-pineapple-camera-sensor-mtp.dts | 19 + trustedvm-pineapple-camera-sensor-mtp.dtsi | 250 ++ trustedvm-pineapple-camera-sensor-qrd.dts | 19 + trustedvm-pineapple-camera-sensor-qrd.dtsi | 250 ++ trustedvm-pineapple-camera.dtsi | 2581 ++++++++++++++++++++ 8 files changed, 3391 insertions(+) create mode 100644 config/pineapple_tuivm.mk create mode 100644 trustedvm-pineapple-camera-sensor-cdp.dts create mode 100644 trustedvm-pineapple-camera-sensor-cdp.dtsi create mode 100644 trustedvm-pineapple-camera-sensor-mtp.dts create mode 100644 trustedvm-pineapple-camera-sensor-mtp.dtsi create mode 100644 trustedvm-pineapple-camera-sensor-qrd.dts create mode 100644 trustedvm-pineapple-camera-sensor-qrd.dtsi create mode 100644 trustedvm-pineapple-camera.dtsi diff --git a/config/pineapple_tuivm.mk b/config/pineapple_tuivm.mk new file mode 100644 index 00000000..e68ed047 --- /dev/null +++ b/config/pineapple_tuivm.mk @@ -0,0 +1,3 @@ +dtbo-$(CONFIG_ARCH_PINEAPPLE) := trustedvm-pineapple-camera-sensor-mtp.dtbo \ + trustedvm-pineapple-camera-sensor-cdp.dtbo \ + trustedvm-pineapple-camera-sensor-qrd.dtbo \ No newline at end of file diff --git a/trustedvm-pineapple-camera-sensor-cdp.dts b/trustedvm-pineapple-camera-sensor-cdp.dts new file mode 100644 index 00000000..75717ea8 --- /dev/null +++ b/trustedvm-pineapple-camera-sensor-cdp.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +#include "trustedvm-pineapple-camera.dtsi" +#include "trustedvm-pineapple-camera-sensor-cdp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Pineapple CDP/RCM - TrustedVM"; + compatible = "qcom,pineapple-cdp", "qcom,pineapple", "qcom,cdp", "qcom,rcm", "qcom,pineapple-rcm"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x10001 0>, <21 0>; +}; diff --git a/trustedvm-pineapple-camera-sensor-cdp.dtsi b/trustedvm-pineapple-camera-sensor-cdp.dtsi new file mode 100644 index 00000000..4a13f9e2 --- /dev/null +++ b/trustedvm-pineapple-camera-sensor-cdp.dtsi @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + led_flash_triple_rear_wide: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_triple_rear_tele: qcom,camera-flash2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_triple_rear_ultrawide: qcom,camera-flash3 { + cell-index = <3>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_aon_rear: qcom,camera-flash4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + + actuator_triple_wide: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = ; + status = "ok"; + }; + + ois_wide: qcom,ois0 { + cell-index = <2>; + compatible = "qcom,ois"; + cci-master = ; + status = "ok"; + }; + + eeprom_tof1: qcom,eeprom7 { + cell-index = <7>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 13 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = ; + status = "ok"; + }; + + eeprom_wide: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 15 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor7 { + cell-index = <7>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 13 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_wide>; + ois-src = <&ois_wide>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear_wide>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 15 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + status = "ok"; + }; + +}; + +&cam_cci1 { + actuator_triple_tele: qcom,actuator3{ + cell-index = <3>; + compatible = "qcom,actuator"; + cci-master = ; + status = "ok"; + }; + + eeprom_tele: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_tele>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + status = "ok"; + }; + +}; + +&cam_cci2 { + eeprom_tof2: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 110 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tof2>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 110 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = ; + status = "ok"; + }; +}; diff --git a/trustedvm-pineapple-camera-sensor-mtp.dts b/trustedvm-pineapple-camera-sensor-mtp.dts new file mode 100644 index 00000000..6e7e233b --- /dev/null +++ b/trustedvm-pineapple-camera-sensor-mtp.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +#include "trustedvm-pineapple-camera.dtsi" +#include "trustedvm-pineapple-camera-sensor-mtp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Pineapple MTP - TrustedVM"; + compatible = "qcom,pineapple-mtp", "qcom,pineapple", "qcom,mtp"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <0x10008 0>, <0x50008 0>; +}; diff --git a/trustedvm-pineapple-camera-sensor-mtp.dtsi b/trustedvm-pineapple-camera-sensor-mtp.dtsi new file mode 100644 index 00000000..4a13f9e2 --- /dev/null +++ b/trustedvm-pineapple-camera-sensor-mtp.dtsi @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + led_flash_triple_rear_wide: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_triple_rear_tele: qcom,camera-flash2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_triple_rear_ultrawide: qcom,camera-flash3 { + cell-index = <3>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_aon_rear: qcom,camera-flash4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + + actuator_triple_wide: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = ; + status = "ok"; + }; + + ois_wide: qcom,ois0 { + cell-index = <2>; + compatible = "qcom,ois"; + cci-master = ; + status = "ok"; + }; + + eeprom_tof1: qcom,eeprom7 { + cell-index = <7>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 13 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = ; + status = "ok"; + }; + + eeprom_wide: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 15 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor7 { + cell-index = <7>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 13 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_wide>; + ois-src = <&ois_wide>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear_wide>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 15 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + status = "ok"; + }; + +}; + +&cam_cci1 { + actuator_triple_tele: qcom,actuator3{ + cell-index = <3>; + compatible = "qcom,actuator"; + cci-master = ; + status = "ok"; + }; + + eeprom_tele: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_tele>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + status = "ok"; + }; + +}; + +&cam_cci2 { + eeprom_tof2: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 110 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tof2>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 110 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = ; + status = "ok"; + }; +}; diff --git a/trustedvm-pineapple-camera-sensor-qrd.dts b/trustedvm-pineapple-camera-sensor-qrd.dts new file mode 100644 index 00000000..607b9df4 --- /dev/null +++ b/trustedvm-pineapple-camera-sensor-qrd.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +#include "trustedvm-pineapple-camera.dtsi" +#include "trustedvm-pineapple-camera-sensor-qrd.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Pineapple QRD - TrustedVM"; + compatible = "qcom,pineapple-qrd", "qcom,pineapple", "qcom,qrd"; + qcom,msm-id = <557 0x10000>, <557 0x20000>, <577 0x10000>, <577 0x20000>; + qcom,board-id = <15 0>, <0x1000B 0>, <0x5000B 0>, <0x1f 0>; +}; diff --git a/trustedvm-pineapple-camera-sensor-qrd.dtsi b/trustedvm-pineapple-camera-sensor-qrd.dtsi new file mode 100644 index 00000000..4a13f9e2 --- /dev/null +++ b/trustedvm-pineapple-camera-sensor-qrd.dtsi @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&soc { + led_flash_triple_rear_wide: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_triple_rear_tele: qcom,camera-flash2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_triple_rear_ultrawide: qcom,camera-flash3 { + cell-index = <3>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + led_flash_aon_rear: qcom,camera-flash4 { + cell-index = <4>; + compatible = "qcom,camera-flash"; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + + actuator_triple_wide: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = ; + status = "ok"; + }; + + ois_wide: qcom,ois0 { + cell-index = <2>; + compatible = "qcom,ois"; + cci-master = ; + status = "ok"; + }; + + eeprom_tof1: qcom,eeprom7 { + cell-index = <7>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 13 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = ; + status = "ok"; + }; + + eeprom_wide: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 15 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor7 { + cell-index = <7>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + eeprom-src = <&eeprom_tof1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 100 0>, + <&tlmm 13 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = <0>; + status = "ok"; + }; + + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_wide>; + ois-src = <&ois_wide>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear_wide>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 101 0>, + <&tlmm 15 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + status = "ok"; + }; + +}; + +&cam_cci1 { + actuator_triple_tele: qcom,actuator3{ + cell-index = <3>; + compatible = "qcom,actuator"; + cci-master = ; + status = "ok"; + }; + + eeprom_tele: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_tele>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 103 0>, + <&tlmm 109 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + status = "ok"; + }; + +}; + +&cam_cci2 { + eeprom_tof2: qcom,eeprom5 { + cell-index = <5>; + compatible = "qcom,eeprom"; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 110 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = ; + status = "ok"; + }; + + qcom,cam-sensor5 { + cell-index = <5>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <5>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tof2>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk5_active + &cam_sensor_active_rst5>; + pinctrl-1 = <&cam_sensor_mclk5_suspend + &cam_sensor_suspend_rst5>; + gpios = <&tlmm 105 0>, + <&tlmm 110 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK5", + "CAM_RESET5"; + cci-master = ; + status = "ok"; + }; +}; diff --git a/trustedvm-pineapple-camera.dtsi b/trustedvm-pineapple-camera.dtsi new file mode 100644 index 00000000..44889a9d --- /dev/null +++ b/trustedvm-pineapple-camera.dtsi @@ -0,0 +1,2581 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&tlmm { + cci_i2c_sda0_active: cci_i2c_sda0_active { + mux { + /* CLK, DATA */ + pins = "gpio113"; + function = "cci_i2c_sda0"; + }; + + config { + pins = "gpio113"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda0_suspend: cci_i2c_sda0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio113"; + function = "cci_i2c_sda0"; + }; + + config { + pins = "gpio113"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl0_active: cci_i2c_scl0_active { + mux { + /* CLK, DATA */ + pins = "gpio114"; + function = "cci_i2c_scl0"; + }; + + config { + pins = "gpio114"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl0_suspend: cci_i2c_scl0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio114"; + function = "cci_i2c_scl0"; + }; + + config { + pins = "gpio114"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda1_active: cci_i2c_sda1_active { + mux { + /* CLK, DATA */ + pins = "gpio115"; + function = "cci_i2c_sda1"; + }; + + config { + pins = "gpio115"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda1_suspend: cci_i2c_sda1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio115"; + function = "cci_i2c_sda1"; + }; + + config { + pins = "gpio115"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl1_active: cci_i2c_scl1_active { + mux { + /* CLK, DATA */ + pins = "gpio116"; + function = "cci_i2c_scl1"; + }; + + config { + pins = "gpio116"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl1_suspend: cci_i2c_scl1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio116"; + function = "cci_i2c_scl1"; + }; + + config { + pins = "gpio116"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda2_active: cci_i2c_sda2_active { + mux { + /* CLK, DATA */ + pins = "gpio117"; + function = "cci_i2c_sda2"; + }; + + config { + pins = "gpio117"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda2_suspend: cci_i2c_sda2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio117"; + function = "cci_i2c_sda2"; + }; + + config { + pins = "gpio117"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl2_active: cci_i2c_scl2_active { + mux { + /* CLK, DATA */ + pins = "gpio118"; + function = "cci_i2c_scl2"; + }; + + config { + pins = "gpio118"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl2_suspend: cci_i2c_scl2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio118"; + function = "cci_i2c_scl2"; + }; + + config { + pins = "gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda3_active: cci_i2c_sda3_active { + mux { + pins = "gpio12"; + function = "cci_i2c_sda3"; + }; + + config { + pins = "gpio12"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda3_suspend: cci_i2c_sda3_suspend { + mux { + pins = "gpio12"; + function = "cci_i2c_sda3"; + }; + + config { + pins = "gpio12"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl3_active: cci_i2c_scl3_active { + mux { + pins = "gpio13"; + function = "cci_i2c_scl3"; + }; + + config { + pins = "gpio13"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl3_suspend: cci_i2c_scl3_suspend { + mux { + pins = "gpio13"; + function = "cci_i2c_scl3"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda4_active: cci_i2c_sda4_active { + mux { + /* CLK, DATA */ + pins = "gpio112"; + function = "cci_i2c_sda4"; + }; + + config { + pins = "gpio112"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda4_suspend: cci_i2c_sda4_suspend { + mux { + /* CLK, DATA */ + pins = "gpio112"; + function = "cci_i2c_sda4"; + }; + + config { + pins = "gpio112"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl4_active: cci_i2c_scl4_active { + mux { + /* CLK, DATA */ + pins = "gpio153"; + function = "cci_i2c_scl4"; + }; + + config { + pins = "gpio153"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl4_suspend: cci_i2c_scl4_suspend { + mux { + /* CLK, DATA */ + pins = "gpio153"; + function = "cci_i2c_scl4"; + }; + + config { + pins = "gpio153"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda5_active: cci_i2c_sda5_active { + mux { + /* CLK, DATA */ + pins = "gpio119"; + function = "cci_i2c_sda5"; + }; + + config { + pins = "gpio119"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda5_suspend: cci_i2c_sda5_suspend { + mux { + /* CLK, DATA */ + pins = "gpio119"; + function = "cci_i2c_sda5"; + }; + + config { + pins = "gpio119"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl5_active: cci_i2c_scl5_active { + mux { + /* CLK, DATA */ + pins = "gpio120"; + function = "cci_i2c_scl5"; + }; + + config { + pins = "gpio120"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl5_suspend: cci_i2c_scl5_suspend { + mux { + /* CLK, DATA */ + pins = "gpio120"; + function = "cci_i2c_scl5"; + }; + + config { + pins = "gpio120"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk0_active: cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_active: cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio101"; + function = "cam_mclk"; + }; + + config { + pins = "gpio101"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio101"; + function = "cam_mclk"; + }; + + config { + pins = "gpio101"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_active: cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio102"; + function = "cam_aon_mclk2"; + }; + + config { + pins = "gpio102"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio102"; + function = "cam_aon_mclk2"; + }; + + config { + pins = "gpio102"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_active: cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio103"; + function = "cam_mclk"; + }; + + config { + pins = "gpio103"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio103"; + function = "cam_mclk"; + }; + + config { + pins = "gpio103"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk4_active: cam_sensor_mclk4_active { + /* MCLK4 */ + mux { + pins = "gpio104"; + function = "cam_aon_mclk4"; + }; + + config { + pins = "gpio104"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk4_suspend: cam_sensor_mclk4_suspend { + /* MCLK4 */ + mux { + pins = "gpio104"; + function = "cam_aon_mclk4"; + }; + + config { + pins = "gpio104"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk5_active: cam_sensor_mclk5_active { + /* MCLK5 */ + mux { + pins = "gpio105"; + function = "cam_mclk"; + }; + + config { + pins = "gpio105"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk5_suspend: cam_sensor_mclk5_suspend { + /* MCLK5 */ + mux { + pins = "gpio105"; + function = "cam_mclk"; + }; + + config { + pins = "gpio105"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk6_active: cam_sensor_mclk6_active { + /* MCLK6 */ + mux { + pins = "gpio108"; + function = "cam_mclk"; + }; + + config { + pins = "gpio108"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk6_suspend: cam_sensor_mclk6_suspend { + /* MCLK6 */ + mux { + pins = "gpio108"; + function = "cam_mclk"; + }; + + config { + pins = "gpio108"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk7_active: cam_sensor_mclk7_active { + /* MCLK7 */ + mux { + pins = "gpio106"; + function = "cam_mclk"; + }; + + config { + pins = "gpio106"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk7_suspend: cam_sensor_mclk7_suspend { + /* MCLK7 */ + mux { + pins = "gpio106"; + function = "cam_mclk"; + }; + + config { + pins = "gpio106"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_active_rst0: cam_sensor_active_rst0 { + mux { + pins = "gpio13"; + function = "gpio"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst0: cam_sensor_suspend_rst0 { + mux { + pins = "gpio13"; + function = "gpio"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst1: cam_sensor_active_rst1 { + mux { + pins = "gpio15"; + function = "gpio"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst1: cam_sensor_suspend_rst1 { + mux { + pins = "gpio15"; + function = "gpio"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst2: cam_sensor_active_rst2 { + mux { + pins = "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio3"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + qcom,apps; + }; + }; + + cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 { + mux { + pins = "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio3"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + qcom,remote; + }; + }; + + cam_sensor_active_rst3: cam_sensor_active_rst3 { + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 { + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst4: cam_sensor_active_rst4 { + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + qcom,apps; + }; + }; + + cam_sensor_suspend_rst4: cam_sensor_suspend_rst4 { + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + qcom,remote; + }; + }; + + cam_sensor_active_rst5: cam_sensor_active_rst5 { + mux { + pins = "gpio110"; + function = "gpio"; + }; + + config { + pins = "gpio110"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst5: cam_sensor_suspend_rst5 { + mux { + pins = "gpio110"; + function = "gpio"; + }; + + config { + pins = "gpio110"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst6: cam_sensor_active_rst6 { + mux { + pins = "gpio111"; + function = "gpio"; + }; + + config { + pins = "gpio111"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst6: cam_sensor_suspend_rst6 { + mux { + pins = "gpio111"; + function = "gpio"; + }; + + config { + pins = "gpio111"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst7: cam_sensor_active_rst7 { + mux { + pins = "gpio164"; + function = "gpio"; + }; + + config { + pins = "gpio164"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst7: cam_sensor_suspend_rst7 { + mux { + pins = "gpio164"; + function = "gpio"; + }; + + config { + pins = "gpio164"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_ponv_front_active: cam_sensor_ponv_front_active { + mux { + pins = "gpio6"; + function = "gpio"; + }; + + config { + pins = "gpio6"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + qcom,apps; + }; + }; + + cam_sensor_ponv_front_suspend: cam_sensor_ponv_front_suspend { + mux { + pins = "gpio6"; + function = "gpio"; + }; + + config { + pins = "gpio6"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + qcom,remote; + }; + }; + + cam_sensor_ponv_rear_active: cam_sensor_ponv_rear_active { + mux { + pins = "gpio2"; + function = "gpio"; + }; + + config { + pins = "gpio2"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + qcom,apps; + }; + }; + + cam_sensor_ponv_rear_suspend: cam_sensor_ponv_rear_suspend { + mux { + pins = "gpio2"; + function = "gpio"; + }; + + config { + pins = "gpio2"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + qcom,remote; + }; + }; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + + qcom,cam-req-mgr { + compatible = "qcom,cam-req-mgr"; + cam-bypass-driver = <(CAM_BYPASS_RGLTR | + CAM_BYPASS_RGLTR_MODE | + CAM_BYPASS_CLKS | + CAM_BYPASS_CESTA | + CAM_BYPASS_ICC)>; + status = "ok"; + }; + + qcom,cam-sync { + compatible = "qcom,cam-sync"; + status = "ok"; + }; + + qcom,cam-i3c-id-table { + i3c-sensor-id-table = <0x1B0 0x0766>; + i3c-eeprom-id-table = <>; + i3c-actuator-id-table = <>; + i3c-ois-id-table = <>; + status = "disabled"; + }; + + cam_csiphy0: qcom,csiphy0@ace4000 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.2.0", "qcom,csiphy"; + reg = <0x0ace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupt-names = "CSIPHY0"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1@ace6000 { + cell-index = <1>; + compatible = "qcom,csiphy-v2.2.0", "qcom,csiphy"; + reg = <0xace6000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe6000>; + interrupt-names = "CSIPHY1"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2@ace8000 { + cell-index = <2>; + compatible = "qcom,csiphy-v2.2.0", "qcom,csiphy"; + reg = <0xace8000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe8000>; + interrupt-names = "CSIPHY2"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3@acea000 { + cell-index = <3>; + compatible = "qcom,csiphy-v2.2.0", "qcom,csiphy"; + reg = <0xacea000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xea000>; + interrupt-names = "CSIPHY3"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy4@acec000 { + cell-index = <4>; + compatible = "qcom,csiphy-v2.2.0", "qcom,csiphy"; + reg = <0xacec000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xec000>; + interrupt-names = "CSIPHY4"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + status = "ok"; + }; + + cam_csiphy5: qcom,csiphy5@acee000 { + cell-index = <5>; + compatible = "qcom,csiphy-v2.2.0", "qcom,csiphy"; + reg = <0xacee000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xee000>; + interrupt-names = "CSIPHY5"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + status = "ok"; + }; + + cam_cci0: qcom,cci0@ac15000 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac15000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x15000>; + interrupt-names = "CCI0"; + interrupts = ; + regulator-names = "gdscr"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci_i2c_scl0_active &cci_i2c_sda0_active>; + pinctrl-1 = <&cci_i2c_scl0_suspend &cci_i2c_sda0_suspend>; + pinctrl-2 = <&cci_i2c_scl1_active &cci_i2c_sda1_active>; + pinctrl-3 = <&cci_i2c_scl1_suspend &cci_i2c_sda1_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1@ac16000 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac16000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x16000>; + interrupt-names = "CCI1"; + interrupts = ; + regulator-names = "gdscr"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci_i2c_scl2_active &cci_i2c_sda2_active>; + pinctrl-1 = <&cci_i2c_scl2_suspend &cci_i2c_sda2_suspend>; + pinctrl-2 = <&cci_i2c_scl3_active &cci_i2c_sda3_active>; + pinctrl-3 = <&cci_i2c_scl3_suspend &cci_i2c_sda3_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci2: qcom,cci2@ac17000 { + cell-index = <2>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac17000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x17000>; + interrupt-names = "CCI2"; + interrupts = ; + regulator-names = "gdscr"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci_i2c_scl4_active &cci_i2c_sda4_active>; + pinctrl-1 = <&cci_i2c_scl4_suspend &cci_i2c_sda4_suspend>; + pinctrl-2 = <&cci_i2c_scl5_active &cci_i2c_sda5_active>; + pinctrl-3 = <&cci_i2c_scl5_suspend &cci_i2c_sda5_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci2: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci2: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci2: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci2: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + qcom,cam_smmu { + compatible = "qcom,msm-cam-smmu", "simple-bus"; + status = "ok"; + expanded_memory; + force_cache_allocs; + need_shared_buffer_padding; + #address-cells = <2>; + #size-cells = <2>; + + msm_cam_smmu_ife { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x808 0x20>; + qcom,iommu-dma-addr-pool = <0x0 0x100000 0xf 0xffe00000>; + qcom,iommu-faults = "stall-disable", "non-fatal"; + dma-coherent; + cam-smmu-label = "ife", "sfe"; + multiple-client-devices; + ife_iova_mem_map: iova-mem-map { + /* IO region is approximately 64 GB */ + iova-mem-region-io { + iova-region-name = "io"; + /* start address: 0x100000 */ + /* leaving 1 MB pad at start */ + iova-region-start = <0x0 0x100000>; + /* Length: 0xfffe00000 */ + /* leaving 1 MB pad at end */ + iova-region-len = <0xf 0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_icp { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1820 0x00>, + <&apps_smmu 0x18C0 0x00>, + <&apps_smmu 0x1800 0x00>, + <&apps_smmu 0x1840 0x00>, + <&apps_smmu 0x1880 0x00>; + cam-smmu-label = "icp"; + qcom,iommu-faults = "stall-disable", "non-fatal"; + qcom,iommu-dma-addr-pool = <0x0 0xf9500000 0xf 0x06a00000>; + dma-coherent; + icp_iova_mem_map: iova-mem-map { + iova-mem-region-shared { + /* Shared region is ~900MB long */ + iova-region-name = "shared"; + /* Start address: 0xc0700000 */ + iova-region-start = <0x0 0xc0700000>; + /* Length: 0x38e00000 */ + iova-region-len = <0x0 0x38e00000>; + iova-region-id = <0x1>; + status = "ok"; + }; + + iova-mem-region-fwuncached-region { + /* FW uncached region is 5 MB long */ + iova-region-name = "fw_uncached"; + /* Start address: 0xc0200000 */ + iova-region-start = <0x0 0xc0200000>; + /* Length: 0x500000 */ + iova-region-len = <0x0 0x500000>; + iova-region-id = <0x6>; + subregion_support; + status = "ok"; + + /* Used for HFI queues/sec heap */ + iova-mem-region-generic-region { + iova-region-name = "icp_hfi"; + iova-region-start = <0x0 0xc0300000>; + /* Length: 0x200000 */ + iova-region-len = <0x0 0x200000>; + iova-region-id = <0x0>; + }; + + /* Global Sync Memory for IPC */ + iova-mem-region-global-sync-region { + iova-region-name = "global_sync"; + iova-region-start = <0x0 0xc0200000>; + /* Length: 0x100000 */ + iova-region-len = <0x0 0x100000>; + iova-region-id = <0x2>; + phy-addr = <0x82600000>; + }; + }; + + iova-mem-device-region { + /* Device region is appropriate 1MB */ + iova-region-name = "device"; + iova-region-start = <0x0 0xc0100000>; + iova-region-len = <0x0 0x100000>; + iova-region-id = <0x7>; + subregion_support; + status = "ok"; + + iova-mem-region-synx-hwmutex { + iova-region-name = "synx_hwmutex"; + iova-region-start = <0x0 0xc0100000>; + iova-region-len = <0x0 0x1000>; + iova-region-id = <0x1>; + phy-addr = <0x1f4a000>; + }; + }; + + iova-mem-region-io { + /* IO region is approximately 60 GB */ + iova-region-name = "io"; + /* Start address: 0xf9500000 */ + iova-region-start = <0x0 0xf9500000>; + /* Length: 0xf06a00000 */ + iova-region-len = <0xf 0x06a00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + + iova-mem-qdss-region { + /* QDSS region is appropriate 1MB */ + iova-region-name = "qdss"; + /* Start address: 0xc0000000 */ + iova-region-start = <0x0 0xc0000000>; + /* Length: 0x100000 */ + iova-region-len = <0x0 0x100000>; + iova-region-id = <0x5>; + qdss-phy-addr = <0x16790000>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_cdm { + compatible = "qcom,msm-cam-smmu-cb"; + iommus = <&apps_smmu 0x1861 0x00>; + cam-smmu-label = "rt-cdm"; + qcom,iommu-faults = "stall-disable", "non-fatal"; + qcom,iommu-dma-addr-pool = <0x0 0x100000 0x0 0xffe00000>; + dma-coherent; + multiple-client-devices; + rt_cdm_iova_mem_map: iova-mem-map { + iova-mem-region-io { + iova-region-name = "io"; + /* 1 MB pad for start */ + iova-region-start = <0x0 0x100000>; + /* 1 MB pad for end */ + iova-region-len = <0x0 0xffe00000>; + iova-region-id = <0x3>; + status = "ok"; + }; + }; + }; + + msm_cam_smmu_secure { + compatible = "qcom,msm-cam-smmu-cb"; + cam-smmu-label = "cam-secure"; + qcom,secure-cb; + }; + }; + + qcom,cam-cpas@ac13000 { + cell-index = <0>; + compatible = "qcom,cam-cpas"; + label = "cpas"; + arch-compat = "cpas_top"; + reg-names = "cam_cpas_top", "cam_camnoc"; + reg = <0xac13000 0x1000>, + <0xac19000 0xac80>; + reg-cam-base = <0x13000 0x19000>; + interrupt-names = "cpas_camnoc"; + interrupts = ; + camnoc-axi-min-ib-bw = <3000000000>; + regulator-names = "gdsc"; + clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", + "nominal", "nominal_l1", "turbo"; + src-clock-name = "camnoc_axi_rt_clk_src"; + domain-id-support-clks = "ife_lite_csid_clk", + "ife_lite_ahb", "csid_clk_src", "csid_clk"; + clock-names-option = "cam_icp_clk", + "ife_lite_csid_clk", + "ife_lite_ahb", "csid_clk_src", "csid_clk"; + clock-rates-option = <400000000>, + <0>, <0>, <0>, <0>; + shared-clks-option = <0 0 0 1 0>; + control-camnoc-axi-clk; + camnoc-bus-width = <32>; + camnoc-axi-clk-bw-margin-perc = <20>; + domain-id = ; + interconnect-names = "cam_ahb"; + cam-ahb-num-cases = <8>; + cam-ahb-bw-KBps = + <0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>, + <0 300000>, <0 300000>, <0 300000>; + vdd-corner-ahb-mapping = "suspend", "lowsvs", + "lowsvs", "svs", "svs_l1", + "nominal", "nominal", "nominal", + "turbo", "turbo"; + client-id-based; + client-names = + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "csiphy4", "csiphy5", "csiphy6","csiphy7", + "cci0", "cci1", "cci2", "csid0", "csid1", "csid2", "csid3", "csid4", + "ife0", "ife1", "ife2", "ife3", "ife4", + "sfe0", "sfe1", "sfe2", "custom0", "custom1", + "ipe0", "rt-cdm0", "rt-cdm1", "rt-cdm2", "rt-cdm3", "rt-cdm4", + "cam-cdm-intf0", "bps0", "icp0", "cre0", + "jpeg-dma0", "jpeg-enc0", "jpeg-dma1", "jpeg-enc1", + "tpg13", "tpg14", "tpg15"; + enable-smart-qos; + rt-wr-priority-min = <4>; + rt-wr-priority-max = <5>; + rt-wr-priority-clamp = <6>; + rt-wr-slope-factor = <70>; + rt-wr-leaststressed-clamp-threshold = <10>; + rt-wr-moststressed-clamp-threshold = <6>; + rt-wr-highstress-indicator-threshold = <50>; + rt-wr-lowstress-indicator-threshold = <0>; + rt-wr-bw-ratio-scale-factor = <1>; + status = "ok"; + + camera-bus-nodes { + level3-nodes { + level-index = <3>; + level3_rt_rd_wr_sum: level3-rt-rd-wr-sum { + cell-index = <0>; + node-name = "level3-rt-rd-wr-sum"; + traffic-merge-type = + ; + ib-bw-voting-needed; + rt-axi-port; + qcom,axi-port-name = "cam_hf"; + qcom,axi-port-mnoc { + interconnect-names = "cam_hf_0", + "cam_ife_0_drv", + "cam_ife_1_drv", + "cam_ife_2_drv"; + }; + }; + + level3_nrt0_rd_wr_sum: level3-nrt0-rd-wr-sum { + cell-index = <1>; + node-name = "level3-nrt0-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf"; + qcom,axi-port-mnoc { + interconnect-names = "cam_sf_0"; + }; + }; + + level3_nrt1_rd_wr_sum: level3-nrt1-rd-wr-sum { + cell-index = <2>; + node-name = "level3-nrt1-rd-wr-sum"; + traffic-merge-type = + ; + qcom,axi-port-name = "cam_sf_icp"; + qcom,axi-port-mnoc { + interconnect-names = + "cam_sf_icp"; + }; + }; + }; + + level2-nodes { + level-index = <2>; + camnoc-max-needed; + level2_rt_wr: level2-rt-wr { + cell-index = <3>; + node-name = "level2-rt-wr"; + parent-node = <&level3_rt_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_rt_rd: level2-rt-rd { + cell-index = <4>; + node-name = "level2-rt-rd"; + parent-node = <&level3_rt_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt_wr: level2-nrt-wr { + cell-index = <5>; + node-name = "level2-nrt-wr"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_nrt_rd: level2-nrt-rd { + cell-index = <6>; + node-name = "level2-nrt-rd"; + parent-node = <&level3_nrt0_rd_wr_sum>; + traffic-merge-type = + ; + }; + + level2_icp_rd: level2-icp-rd { + cell-index = <7>; + node-name = "level2-icp-rd"; + parent-node = <&level3_nrt1_rd_wr_sum>; + traffic-merge-type = + ; + bus-width-factor = <4>; + }; + }; + + level1-nodes { + level-index = <1>; + camnoc-max-needed; + level1_rt1_wr: level1-rt1-wr { + cell-index = <8>; + node-name = " level1-rt1-ife-ubwc-wr"; + parent-node = <&level2_rt_wr>; + traffic-merge-type = + ; + rt-wr-niu; + niu-size = <134>; + priority-lut-low-offset = <0x9230>; + priority-lut-high-offset = <0x9234>; + }; + + level1_rt2_wr: level1-rt2-wr { + cell-index = <9>; + node-name = "level1-rt2-ife-stats"; + parent-node = <&level2_rt_wr>; + traffic-merge-type = + ; + rt-wr-niu; + niu-size = <36>; + priority-lut-low-offset = <0x9430>; + priority-lut-high-offset = <0x9434>; + }; + + level1_rt3_wr: level1-rt3-wr { + cell-index = <10>; + node-name = "level1-rt3-ife-pdaf-lite"; + parent-node = <&level2_rt_wr>; + traffic-merge-type = + ; + rt-wr-niu; + niu-size = <92>; + priority-lut-low-offset = <0x9630>; + priority-lut-high-offset = <0x9634>; + }; + + level1_rt4_wr: level1-rt4-wr1 { + cell-index = <11>; + node-name = "level1-rt4-ife-rdi-wr"; + parent-node = <&level2_rt_wr>; + traffic-merge-type = + ; + rt-wr-niu; + niu-size = <134>; + priority-lut-low-offset = <0x9830>; + priority-lut-high-offset = <0x9834>; + }; + + level1_rt0_rd: level1-rt0-rd { + cell-index = <12>; + node-name = "level1-sfe-rd"; + parent-node = <&level2_rt_rd>; + traffic-merge-type = + ; + }; + + level1_nrt2_wr: level1-nrt2-wr { + cell-index = <13>; + node-name = "level1-nrt2-wr"; + parent-node = <&level2_nrt_wr>; + traffic-merge-type = + ; + }; + + level1_nrt1_wr: level1-nrt1-wr { + cell-index = <14>; + node-name = "level1-nrt0-wr1"; + parent-node = <&level2_nrt_wr>; + traffic-merge-type = + ; + }; + + level1_nrt3_rd: level1-nrt3-rd { + cell-index = <15>; + node-name = "level1-nrt3-rd"; + parent-node = <&level2_nrt_rd>; + traffic-merge-type = + ; + }; + + level1_nrt1_rd: level1-nrt1-rd { + cell-index = <16>; + node-name = "level1-nrt1-rd"; + parent-node = <&level2_nrt_rd>; + traffic-merge-type = + ; + }; + + level1_nrt0_rd: level1-nrt0-rd { + cell-index = <17>; + node-name = "level1-nrt0-rd"; + parent-node = <&level2_nrt_rd>; + traffic-merge-type = + ; + }; + }; + + level0-nodes { + level-index = <0>; + ife0_ubwc_wr: ife0-ubwc-wr { + cell-index = <18>; + node-name = "ife0-ubwc-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt1_wr>; + }; + + ife1_ubwc_wr: ife1-ubwc-wr { + cell-index = <19>; + node-name = "ife1-ubwc-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt1_wr>; + }; + + ife2_ubwc_wr: ife2-ubwc-wr { + cell-index = <20>; + node-name = "ife2-ubwc-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt1_wr>; + }; + + ife0_rdi_pixel_raw_wr: ife0-rdi-pixel-raw-wr { + cell-index = <21>; + node-name = "ife0-rdi-pixel-raw-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt4_wr>; + }; + + ife1_rdi_pixel_raw_wr: ife1-rdi-pixel-raw-wr { + cell-index = <22>; + node-name = "ife1-rdi-pixel-raw-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt4_wr>; + }; + + ife2_rdi_pixel_raw_wr: ife2-rdi-pixel-raw-wr { + cell-index = <23>; + node-name = "ife2-rdi-pixel-raw-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt4_wr>; + }; + + sfe0_all_wr: sfe0-all-wr { + cell-index = <24>; + node-name = "sfe0-all-wr"; + client-name = "sfe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt4_wr>; + }; + + sfe1_all_wr: sfe1-all-wr { + cell-index = <25>; + node-name = "sfe1-all-wr"; + client-name = "sfe1"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt4_wr>; + }; + + sfe2_all_wr: sfe2-all-wr { + cell-index = <26>; + node-name = "sfe2-all-wr"; + client-name = "sfe2"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt4_wr>; + }; + + custom0_wr: custom0-wr { + cell-index = <27>; + node-name = "custom0-wr"; + client-name = "custom0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt4_wr>; + }; + + custom1_wr: custom1-wr { + cell-index = <28>; + node-name = "custom1-wr"; + client-name = "custom1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_rt4_wr>; + }; + + ife0_pdaf_linear_wr: ife0-pdaf-linear-wr { + cell-index = <29>; + node-name = "ife0-pdaf-linear-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt3_wr>; + }; + + ife1_pdaf_linear_wr: ife1-pdaf-linear-wr { + cell-index = <30>; + node-name = "ife1-pdaf-linear-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt3_wr>; + }; + + ife2_pdaf_linear_wr: ife2-pdaf-linear-wr { + cell-index = <31>; + node-name = "ife2-pdaf-linear-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt3_wr>; + }; + + ife4_rdi_stats_pixel_raw_wr: ife4-rdi-stats-pixel-raw-wr { + cell-index = <32>; + node-name = "ife4-rdi-stats-pixel-raw-wr"; + client-name = "ife4"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt3_wr>; + }; + + ife3_rdi_stats_pixel_raw_wr: ife3-rdi-stats-pixel-raw-wr { + cell-index = <33>; + node-name = "ife3-rdi-stats-pixel-raw-wr"; + client-name = "ife3"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level1_rt3_wr>; + }; + + ife0_stats_wr: ife0-stats-wr { + cell-index = <34>; + node-name = "ife0-stats-wr"; + client-name = "ife0"; + traffic-data = + ; + traffic-transaction-type = + ; + drv-voting-index = + ; + parent-node = <&level1_rt2_wr>; + }; + + ife1_stats_wr: ife1-stats-wr { + cell-index = <35>; + node-name = "ife1-stats-wr"; + client-name = "ife1"; + traffic-data = + ; + traffic-transaction-type = + ; + drv-voting-index = + ; + parent-node = <&level1_rt2_wr>; + }; + + ife2_stats_wr: ife2-stats-wr { + cell-index = <36>; + node-name = "ife2-stats-wr"; + client-name = "ife2"; + traffic-data = + ; + traffic-transaction-type = + ; + drv-voting-index = + ; + parent-node = <&level1_rt2_wr>; + }; + + sfe0_all_rd: sfe0-all-rd { + cell-index = <37>; + node-name = "sfe0-all-rd"; + client-name = "sfe0"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt0_rd>; + }; + + sfe1_all_rd: sfe1-all-rd { + cell-index = <38>; + node-name = "sfe1-all-rd"; + client-name = "sfe1"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt0_rd>; + }; + + sfe2_all_rd: sfe2-all-rd { + cell-index = <39>; + node-name = "sfe2-all-rd"; + client-name = "sfe2"; + traffic-data = + ; + traffic-transaction-type = + ; + constituent-paths = + ; + drv-voting-index = + ; + parent-node = <&level1_rt0_rd>; + }; + + custom0_all_rd: custom0-rd { + cell-index = <40>; + node-name = "custom0-rd"; + client-name = "custom0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd>; + }; + + custom1_rd: custom1-rd { + cell-index = <41>; + node-name = "custom1-rd"; + client-name = "custom1"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level1_rt0_rd>; + }; + + ipe0_all_wr: ipe0-all-wr { + cell-index = <42>; + node-name = "ipe0-all-wr"; + client-name = "ipe0"; + traffic-data = ; + traffic-transaction-type = + ; + constituent-paths = + ; + parent-node = <&level2_nrt_wr>; + }; + + bps0_all_wr: bps0-all-wr { + cell-index = <43>; + node-name = "bps0-all-wr"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt2_wr>; + }; + + cre0_all_wr: cre0-all-wr { + cell-index = <44>; + node-name = "cre0-all-wr"; + client-name = "cre0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt2_wr>; + }; + + jpeg_enc0_all_wr: jpeg-enc0-all-wr { + cell-index = <45>; + node-name = "jpeg-enc0-all-wr"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_wr>; + }; + + jpeg_dma0_all_wr: jpeg-dma0-all-wr { + cell-index = <46>; + node-name = "jpeg-dma0-all-wr"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_wr>; + }; + + + jpeg_enc1_all_wr: jpeg-enc1-all-wr { + cell-index = <47>; + node-name = "jpeg-enc1-all-wr"; + client-name = "jpeg-enc1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_wr>; + }; + + jpeg_dma1_all_wr: jpeg-dma1-all-wr { + cell-index = <48>; + node-name = "jpeg-dma1-all-wr"; + client-name = "jpeg-dma1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_wr>; + }; + + cre0_all_rd: cre0-all-rd { + cell-index = <49>; + node-name = "cre0-all-rd"; + client-name = "cre0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt3_rd>; + }; + + bps0_all_rd: bps0-all-rd { + cell-index = <50>; + node-name = "bps0-all-rd"; + client-name = "bps0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt3_rd>; + }; + + jpeg_enc0_all_rd: jpeg0-enc0-all-rd { + cell-index = <51>; + node-name = "jpeg-enc0-rd"; + client-name = "jpeg-enc0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_rd>; + }; + + jpeg_dma0_all_rd: jpeg0-dma0-all-rd { + cell-index = <52>; + node-name = "jpeg-dma0-rd"; + client-name = "jpeg-dma0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_rd>; + }; + + + jpeg_enc1_all_rd: jpeg1-enc1-all-rd { + cell-index = <53>; + node-name = "jpeg-enc1-rd"; + client-name = "jpeg-enc1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_rd>; + }; + + jpeg_dma1_all_rd: jpeg1-dma1-all-rd { + cell-index = <54>; + node-name = "jpeg-dma1-rd"; + client-name = "jpeg-dma1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt1_rd>; + }; + + + ipe0_ref_rd: ipe0-ref-rd { + cell-index = <55>; + node-name = "ipe0-ref-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt_rd>; + }; + + ipe0_in_rd: ipe0-in-rd { + cell-index = <56>; + node-name = "ipe0-in-rd"; + client-name = "ipe0"; + traffic-data = + ; + traffic-transaction-type = + ; + parent-node = <&level2_nrt_rd>; + }; + + rt_cdm0_all_rd: rt-cdm0-all-rd { + cell-index = <57>; + node-name = "rt-cdm0-all-rd"; + client-name = "rt-cdm0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + rt_cdm1_all_rd: rt-cdm1-all-rd { + cell-index = <58>; + node-name = "rt-cdm1-all-rd"; + client-name = "rt-cdm1"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + rt_cdm2_all_rd: rt-cdm2-all-rd { + cell-index = <59>; + node-name = "rt-cdm2-all-rd"; + client-name = "rt-cdm2"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + rt_cdm3_all_rd: rt-cdm3-all-rd { + cell-index = <60>; + node-name = "rt-cdm3-all-rd"; + client-name = "rt-cdm3"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + rt_cdm4_all_rd: rt-cdm4-all-rd { + cell-index = <61>; + node-name = "rt-cdm4-all-rd"; + client-name = "rt-cdm4"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level1_nrt0_rd>; + }; + + icp0_all_rd: icp0-all-rd { + cell-index = <62>; + node-name = "icp0-all-rd"; + client-name = "icp0"; + traffic-data = ; + traffic-transaction-type = + ; + parent-node = <&level2_icp_rd>; + }; + + }; + }; + }; + + qcom,cam-cdm-intf { + compatible = "qcom,cam-cdm-intf"; + cell-index = <0>; + label = "cam-cdm-intf"; + num-hw-cdm = <1>; + cdm-client-names = "vfe", + "jpegdma", + "jpegenc"; + status = "ok"; + }; + + qcom,rt-cdm0@ac25000 { + cell-index = <0>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac25000 0x580>; + reg-names = "rt-cdm0"; + reg-cam-base = <0x25000>; + interrupt-names = "rt-cdm0"; + interrupts = ; + regulator-names = "gdsc"; + nrt-device; + cdm-client-names = "ife0", "dualife0"; + config-fifo; + fifo-depths = <64 0 0 0>; + cam_hw_pid = <25>; + cam-hw-mid = <0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm1@ac26000 { + cell-index = <1>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac26000 0x580>; + reg-names = "rt-cdm1"; + reg-cam-base = <0x26000>; + interrupt-names = "rt-cdm1"; + interrupts = ; + regulator-names = "gdsc"; + nrt-device; + cdm-client-names = "ife1", "dualife1"; + config-fifo; + fifo-depths = <64 0 0 0>; + cam_hw_pid = <26>; + cam-hw-mid = <0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm2@ac27000 { + cell-index = <2>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac27000 0x580>; + reg-names = "rt-cdm2"; + reg-cam-base = <0x27000>; + interrupt-names = "rt-cdm2"; + interrupts = ; + regulator-names = "gdsc"; + nrt-device; + cdm-client-names = "ife2", "dualife2"; + config-fifo; + fifo-depths = <64 0 0 0>; + cam_hw_pid = <27>; + cam-hw-mid = <0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm3@ac28000 { + cell-index = <3>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac28000 0x580>; + reg-names = "rt-cdm3"; + reg-cam-base = <0x28000>; + interrupt-names = "rt-cdm3"; + interrupts = ; + regulator-names = "gdsc"; + nrt-device; + cdm-client-names = "ife3"; + config-fifo; + fifo-depths = <64 0 0 0>; + cam_hw_pid = <24>; + cam-hw-mid = <0>; + single-context-cdm; + status = "ok"; + }; + + qcom,rt-cdm4@ac29000 { + cell-index = <4>; + compatible = "qcom,cam-rt-cdm2_1"; + label = "rt-cdm"; + reg = <0xac29000 0x580>; + reg-names = "rt-cdm4"; + reg-cam-base = <0x29000>; + interrupt-names = "rt-cdm4"; + interrupts = ; + regulator-names = "gdsc"; + nrt-device; + cdm-client-names = "ife4"; + config-fifo; + fifo-depths = <64 0 0 0>; + cam_hw_pid = <30>; + cam-hw-mid = <0>; + single-context-cdm; + status = "ok"; + }; + + qcom,cam-isp { + compatible = "qcom,cam-isp"; + arch-compat = "ife"; + status = "ok"; + }; + + cam_sfe0: qcom,sfe0@ac9e000 { + cell-index = <0>; + compatible = "qcom,sfe880"; + reg-names = "sfe0"; + reg = <0xac9e000 0x8000>; + reg-cam-base = <0x9e000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "sfe0"; + interrupts = ; + regulator-names = "gdsc", "sfe0"; + cam_hw_pid = <11 0>; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_sfe1: qcom,sfe1@aca6000 { + cell-index = <1>; + compatible = "qcom,sfe880"; + reg-names = "sfe1"; + reg = <0xaca6000 0x8000>; + reg-cam-base = <0xa6000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "sfe1"; + interrupts = ; + regulator-names = "gdsc", "sfe1"; + cam_hw_pid = <12 1>; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_sfe2: qcom,sfe2@acae000 { + cell-index = <2>; + compatible = "qcom,sfe880"; + reg-names = "sfe2"; + reg = <0xacae000 0x8000>; + reg-cam-base = <0xae000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "sfe2"; + interrupts = ; + regulator-names = "gdsc", "sfe2"; + cam_hw_pid = <13 2>; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_csid0: qcom,csid0@acb7000 { + cell-index = <0>; + compatible = "qcom,csid880"; + reg-names = "csid", "csid_top"; + reg = <0xacb8000 0xd00>, + <0xacb6000 0x1000>; + reg-cam-base = <0xb8000 0xb6000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "csid0"; + interrupts = ; + regulator-names = "gdsc"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe0: qcom,ife0@ac62000 { + cell-index = <0>; + compatible = "qcom,vfe880"; + reg-names = "ife", "cam_camnoc"; + reg = <0xac62000 0xf000>, + <0xac19000 0xac80>; + reg-cam-base = <0x62000 0x19000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "ife0"; + interrupts = ; + regulator-names = "gdsc", "ife0"; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <16 20 24 8>; + status = "ok"; + }; + + cam_csid1: qcom,csid1@acb9000 { + cell-index = <1>; + compatible = "qcom,csid880"; + reg-names = "csid", "csid_top"; + reg = <0xacba000 0xd00>, + <0xacb6000 0x1000>; + reg-cam-base = <0xba000 0xb6000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "csid1"; + interrupts = ; + regulator-names = "gdsc"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe1: qcom,ife1@ac71000 { + cell-index = <1>; + compatible = "qcom,vfe880"; + reg-names = "ife", "cam_camnoc"; + reg = <0xac71000 0xf000>, + <0xac19000 0xac80>; + reg-cam-base = <0x71000 0x19000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "ife1"; + interrupts = ; + regulator-names = "gdsc", "ife1"; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <17 21 25 9>; + status = "ok"; + }; + + cam_csid2: qcom,csid2@acbb000 { + cell-index = <2>; + compatible = "qcom,csid880"; + reg-names = "csid", "csid_top"; + reg = <0xacbc000 0xd00>, + <0xacb6000 0x1000>; + reg-cam-base = <0xbc000 0xb6000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "csid2"; + interrupts = ; + regulator-names = "gdsc"; + src-clock-name = "csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe2: qcom,ife2@ac80000 { + cell-index = <2>; + compatible = "qcom,vfe880"; + reg-names = "ife", "cam_camnoc"; + reg = <0xac80000 0xf000>, + <0xac19000 0xac80>; + reg-cam-base = <0x80000 0x19000>; + rt-wrapper-base = <0x62000>; + interrupt-names = "ife2"; + interrupts = ; + regulator-names = "gdsc", "ife2"; + ubwc-static-cfg = <0x1026 0x1036>; + cam_hw_pid = <18 22 26 10>; + status = "ok"; + }; + + cam_csid_lite0: qcom,csid-lite0@acca000 { + cell-index = <3>; + compatible = "qcom,csid-lite880"; + reg-names = "csid-lite"; + reg = <0xaccb000 0xa00>; + reg-cam-base = <0xcb000>; + rt-wrapper-base = <0xca000>; + interrupt-names = "csid-lite0"; + interrupts = ; + regulator-names = "gdsc"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_lite_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite0: qcom,ife-lite0@acca000 { + cell-index = <3>; + compatible = "qcom,vfe-lite880"; + reg-names = "ife-lite"; + reg = <0xaccb000 0x2800>; + reg-cam-base = <0xcb000>; + rt-wrapper-base = <0xca000>; + interrupt-names = "ife-lite0"; + interrupts = ; + regulator-names = "gdsc"; + src-clock-name = "ife_lite_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <27>; + status = "ok"; + }; + + cam_csid_lite1: qcom,csid-lite1@accf000 { + cell-index = <4>; + compatible = "qcom,csid-lite880"; + reg-names = "csid-lite"; + reg = <0xacd0000 0xa00>; + reg-cam-base = <0xd0000>; + rt-wrapper-base = <0xca000>; + interrupt-names = "csid-lite1"; + interrupts = ; + regulator-names = "gdsc"; + clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", + "turbo"; + src-clock-name = "ife_lite_csid_clk_src"; + clock-control-debugfs = "true"; + status = "ok"; + }; + + cam_vfe_lite1: qcom,ife-lite1@accf000 { + cell-index = <4>; + compatible = "qcom,vfe-lite880"; + reg-names = "ife-lite"; + reg = <0xacd0000 0x2800>; + reg-cam-base = <0xd0000>; + rt-wrapper-base = <0xca000>; + interrupt-names = "ife-lite1"; + interrupts = ; + regulator-names = "gdsc"; + src-clock-name = "ife_lite_clk_src"; + clock-control-debugfs = "true"; + cam_hw_pid = <28>; + status = "ok"; + }; + + cam_csiphy_tpg13: qcom,tpg13@acf6000 { + cell-index = <13>; + phy-id = <0>; + compatible = "qcom,cam-tpg104"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xacf6000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf6000 0x13000>; + regulator-names = "gdsc"; + interrupt-names = "tpg0"; + interrupts = ; + status = "ok"; + }; + + cam_csiphy_tpg14: qcom,tpg14@acf7000 { + cell-index = <14>; + phy-id = <1>; + compatible = "qcom,cam-tpg104"; + reg-names = "tpg1", "cam_cpas_top"; + reg = <0xacf7000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf7000 0x13000>; + regulator-names = "gdsc"; + interrupt-names = "tpg1"; + interrupts = ; + status = "ok"; + }; + + cam_csiphy_tpg15: qcom,tpg15@acf8000 { + cell-index = <15>; + phy-id = <2>; + compatible = "qcom,cam-tpg104"; + reg-names = "tpg2", "cam_cpas_top"; + reg = <0xacf8000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf8000 0x13000>; + regulator-names = "gdsc"; + interrupt-names = "tpg2"; + interrupts = ; + status = "ok"; + }; +}; +