diff --git a/qcom/sun-pinctrl.dtsi b/qcom/sun-pinctrl.dtsi index 37cbb70b..bb1e63b0 100644 --- a/qcom/sun-pinctrl.dtsi +++ b/qcom/sun-pinctrl.dtsi @@ -281,6 +281,242 @@ }; }; + tdm0_clk { + tdm0_clk_sleep: tdm0_clk_sleep { + mux { + pins = "gpio126"; + function = "gpio"; + }; + + config { + pins = "gpio126"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm0_clk_active: tdm0_clk_active { + mux { + pins = "gpio126"; + function = "i2s0_sck"; + }; + + config { + pins = "gpio126"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + tdm0_ws { + tdm0_ws_sleep: tdm0_ws_sleep { + mux { + pins = "gpio129"; + function = "gpio"; + }; + + config { + pins = "gpio129"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm0_ws_active: tdm0_ws_active { + mux { + pins = "gpio129"; + function = "i2s0_ws"; + }; + + config { + pins = "gpio129"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + tdm0_sd0 { + tdm0_sd0_sleep: tdm0_sd0_sleep { + mux { + pins = "gpio127"; + function = "gpio"; + }; + + config { + pins = "gpio127"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm0_sd0_active: tdm0_sd0_active { + mux { + pins = "gpio127"; + function = "i2s0_data0"; + }; + + config { + pins = "gpio127"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + tdm0_sd1 { + tdm0_sd1_sleep: tdm0_sd1_sleep { + mux { + pins = "gpio128"; + function = "gpio"; + }; + + config { + pins = "gpio128"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm0_sd1_active: tdm0_sd1_active { + mux { + pins = "gpio128"; + function = "i2s0_data1"; + }; + + config { + pins = "gpio128"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + tdm1_clk { + tdm1_clk_sleep: tdm1_clk_sleep { + mux { + pins = "gpio121"; + function = "gpio"; + }; + + config { + pins = "gpio121"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm1_clk_active: tdm1_clk_active { + mux { + pins = "gpio121"; + function = "i2s1_sck"; + }; + + config { + pins = "gpio121"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tdm1_ws { + tdm1_ws_sleep: tdm1_ws_sleep { + mux { + pins = "gpio123"; + function = "gpio"; + }; + + config { + pins = "gpio123"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm1_ws_active: tdm1_ws_active { + mux { + pins = "gpio123"; + function = "i2s1_ws"; + }; + + config { + pins = "gpio123"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tdm1_sd0 { + tdm1_sd0_sleep: tdm1_sd0_sleep { + mux { + pins = "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio122"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm1_sd0_active: tdm1_sd0_active { + mux { + pins = "gpio122"; + function = "i2s1_data0"; + }; + + config { + pins = "gpio122"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tdm1_sd1 { + tdm1_sd1_sleep: tdm1_sd1_sleep { + mux { + pins = "gpio124"; + function = "gpio"; + }; + + config { + pins = "gpio124"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tdm1_sd1_active: tdm1_sd1_active { + mux { + pins = "gpio124"; + function = "i2s1_data1"; + }; + + config { + pins = "gpio124"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + pcie0 { pcie0_perst_default: pcie0_perst_default { mux {