From 91ac0fb4e595f0c4e8e81ecfff6923b7ce0cb006 Mon Sep 17 00:00:00 2001
From: Atul Pant <quic_atulpant@quicinc.com>
Date: Mon, 25 Nov 2024 16:11:08 +0530
Subject: [PATCH] ARM: dts: qcom: Add cpufreq cycle counter for kera

Add cpufreq cycle counter register information to devicetree in a
separate node.

Change-Id: Ib9c21300cda585d4f25be12cb9527d719eb630ea
Signed-off-by: Atul Pant <quic_atulpant@quicinc.com>
---
 qcom/kera-walt.dtsi | 22 ++++++++++++++++++++++
 qcom/kera.dtsi      |  1 +
 2 files changed, 23 insertions(+)
 create mode 100644 qcom/kera-walt.dtsi

diff --git a/qcom/kera-walt.dtsi b/qcom/kera-walt.dtsi
new file mode 100644
index 00000000..627030bc
--- /dev/null
+++ b/qcom/kera-walt.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	walt {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		cycle-cntr@17d91000 {
+			compatible = "qcom,epss";
+			reg = <0x17D91000 0x1000>,
+				<0x17D92000 0x1000>,
+				<0x17D93000 0x1000>;
+			reg-names = "freq-domain0",
+				"freq-domain1",
+				"freq-domain2";
+		};
+	};
+};
diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi
index 791751e6..be832695 100644
--- a/qcom/kera.dtsi
+++ b/qcom/kera.dtsi
@@ -2885,6 +2885,7 @@
 #include "kera-usb.dtsi"
 #include "kera-qupv3.dtsi"
 #include "kera-thermal.dtsi"
+#include "kera-walt.dtsi"
 
 &qupv3_se13_2uart {
 	status = "ok";